Abstract

Abstract
The eXtreme Processing Platform (XPP) is a unique reconfigurable computing (RC) architecture supported by a complete set of design tools. This paper presents the XPP Vectorizing C Compiler XPP-VC, the first high-level compiler for this architecture. It uses new mapping techniques, combined with efficient vectorization. A temporal partitioning phase guarantees the compilation of programs with unlimited complexity, provided that only the supported C subset is used. A new loop partitioning scheme permits to map large loops of any kind. It is not constrained by loop dependences or nesting levels. To our knowledge, the compilation performance is unmatched by any other compiler for RC. Preliminary evaluations show compilation times of only a few seconds from C code to configuration binaries and performance speedups over standard microprocessor implementations. The overall technology represents a significant step toward RC architectures which are faster and simpler to program.

Abstract
This paper describes an approach to the technical and organisational design of networked (and virtual) enterprises using a social actors network perspective. The goal is to outline a set of methods, tools and models that support a more effective analysis, design, implementation and (re)configuration of of the organisational structure and information systems supportting networks of enterprises. This paper introduces the social actors network concept, as well as its principles and scope, The application of social actors network in the domain of networked/virtual enterprises is explained. The paper concludes with an example derived from the EU supported Co-Operate IST project.

Abstract
Reconfigurable systems, and in particular, FPGA-based custom computing machines, offer a unique opportunity to define application-specific architectures. These architectures offer performance advantages for application domains such as image processing, where the use of customized pipelines exploits the inherent coarse-grain parallelism. In this paper we describe a set of program analyses and an implementation that map a sequential and un-annotated C program into a pipelined implementation running on a set of FPGAs, each with multiple external memories. Based on well-known parallel computing analysis techniques, our algorithms perform unrolling for operator parallelization, reuse and data layout for memory parallelization and precise communication analysis. We extend these techniques for FPGA-based systems to automatically partition the application data and computation into custom pipeline stages, taking into account the available FPGA and interconnect resources. We illustrate the analysis components by way of an example, a machine vision program. We present the algorithm results, derived with minimal manual intervention, which demonstrate the potential of this approach for automatically deriving pipelined designs from high-level sequential specifications. © 2002 IEEE.

Abstract
This paper presents a new approach for the simultaneous identification of rotor flux components in the rotor reference frame and electrical parameters of a vector controlled induction motor, for real-time implementations, using an extended Kalman filter (EKF) and a reduced order model structure for lower computational effort. The proposed new method requires the measurement of motor speed, stator voltages and currents signals. Using a motor model structure with four electrical parameters, the estimation of flux space phasor and rotor parameters is presented. The estimation is subsequently further extended to include the motor stator parameters and the results are analyzed as well as robustness. Simulated and experimental studies highlight the improvements brought by this new approach, mainly, a simple and reduced state equation, the introduced scalar output equation and lower computational cadency, by using lower sampling frequencies in the proposed rotor reference frame.

Abstract
Version vectors and their variants play a central role in update tracking in optimistic distributed systems. Existing mechanisms for a variable number of participants use a mapping from identities to integers, and rely on some form of global configuration or distributed naming protocol to assign unique identifiers to each participant. These approaches are incompatible with replica creation under arbitrary partitions, a typical mode of operation in mobile or poorly connected environments. We present an update tracking mechanism that overcomes this limitation; it departs from the traditional mapping and avoids the use of integer counters, while providing all the functionality of version vectors in what concerns version tracking.