2005
Authors
Bernardeschi, Cinzia; Lettieri, Giuseppe; Martini, Luca; Masci, Paolo;
Publication
Electr. Notes Theor. Comput. Sci.
Abstract
The bytecode verification is a key point of the security chain of the Java Platform. This feature is optional in many embedded devices since the memory requirements of the verification process are too high. In this paper we propose a verification algorithm that remarkably reduces the use of the memory by performing the verification during multiple specialized passes. The algorithm reduces the type encoding space by operating on different abstractions of the domain of types. The results of the experiments show that this bytecode verification can be performed directly on small memory systems.
2005
Authors
Reis, C; Machado, JAT; Cunha, JB;
Publication
WSEAS Transactions on Information Science and Applications
Abstract
This paper proposes a genetic algorithm for designing combinational logic circuits and studies four different/case examples: the 2-to-1 multiplexer, the one-bit full adder, the four-bit parity checker and the two-bit multiplier. The objective of this work is to generate a functional circuit with the minimum number of logic gates. It is also studied the scalability problem that emerges from the exponential growth of the truth table when the circuits complexity increases. Furthermore, it is as well investigated the population size and the processing time for achieving a solution in order to establish a compromise between the two parameters.
2005
Authors
Fortuna, P; Carneiro, G; Ricardo, M;
Publication
Proceedings of the IEEE 16th International Symposium on Personal, Indoor and Mobile Radio Communications, Berlin, Germany, September 11-14, 2005
Abstract
The 4th Generation of mobile communication networks will use heterogeneous wireless technologies. Voice and low quality video flows will consist of very small FP packets, for which the standard RTP/UDP/IP headers constitute a significant overhead. Considering that the radio resources are scarce, this overhead may be unacceptable and the adoption of header compression mechanisms is desirable. This paper presents a solution for including RoHC header compression mechanisms within 4G networks; the solution is combined with the mechanisms required to provide QoS to the real time flows. © 2005 IEEE.
2005
Authors
Abrantes, F; Ricardo, M;
Publication
Proceedings of the IEEE 16th International Symposium on Personal, Indoor and Mobile Radio Communications, Berlin, Germany, September 11-14, 2005
Abstract
Real-time multimedia applications, such as VoIP, video conferencing or on-line gaming are key applications to the success of 4G. In today's Internet these applications are not subject to congestion control, therefore the growth of popularity of these applications may endanger the stability of the Internet. On the other hand, 4G networks will be much more dynamic due to mobility and multi-homing, and the network conditions may vary abruptly requiring a fast response from the control mechanism. In this article we compare the feedback-based to the reservation-based congestion control approach and focus on the first one, by evaluating some mechanisms with respect to Media Friendliness, Scalability and Dynamic Behaviour. We also present a set of requirements for the ideal congestion control mechanism of real-time flows in 4G networks. © 2005 IEEE.
2005
Authors
Agreira, CIF; Ferreira, CMM; Pinto, JAD; Barbosa, FPM;
Publication
UPEC 2004: 39th International Universitities Power Engineering Conference, Vols 1-3, Conference Proceedings
Abstract
In the last years the importance of the security analysis has been increasing, due to economical and environment constrains. The operation of an electrical power system is a complex task due to the high degree of uncertainty and the large number of parameters involved. This paper is devoted to the presentation of an efficient steady-state contingency classification using the Rough Set Theory. The developed technique produces a classification of the system operating in four possible states. The powerful methodology developed was applied to a test power network in four different scenarios. The numerical results were compared and analysed in order to obtained important conclusions that provide a valuable contribution to the understanding of the power system security problem.
2005
Authors
Pereira, J; Lucus, BG;
Publication
2005 IEEE Russia Power Tech, PowerTech
Abstract
The proposal of this paper aims to beginning the definition of a formal abstract specification providing a framework, for Electric Power System Software developers to create software, that enables their users to access and process electric network data structures, from a variety of sources and zoning levels. In this framework the user will be able to dealing with a variety of perspectives in power system models by decomposing these models in object components. With the component technology the power system structures and model will be decompose in elementary object-components that can be interchanged across several final uses, software and hardware platforms without operational losses.
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