Cookies Policy
The website need some cookies and similar means to function. If you permit us, we will use those means to collect data on your visits for aggregated statistics to improve our service. Find out More
Accept Reject
  • Menu
Publications

2009

An Infrastructure for Experience Centered Agile Prototyping of Ambient Intelligence

Authors
Silva, JL; Campos, JC; Harrison, MD;

Publication
EICS'09: PROCEEDINGS OF THE ACM SIGCHI SYMPOSIUM ON ENGINEERING INTERACTIVE COMPUTING SYSTEMS

Abstract
Ubiquitous computing poses new usability challenges that cut across design and development. We are particularly interested in "spaces" enhanced with sensors, public displays and personal devices. How can prototypes be used to explore the user's mobility and interaction, both explicitly and implicitly, to access services within these environments? Because of the potential cost of development and design failure, the characteristics of such systems must be explored using early versions of the system that could disrupt if used in the target environment. Being able to evaluate these systems early in the process is crucial to their successful development. This paper reports on an effort to develop a framework for the rapid prototyping and analysis of ambient intelligence systems.

2009

Cognitive Technologies: Preface

Authors
Brazdil, P; Giraud Carrier, C; Soares, C; Vilalta, R;

Publication
Cognitive Technologies

Abstract

2009

Software Knowledge Capture and Acquisition: Tool Support for Agile Settings

Authors
Correia, FF; Aguiar, A;

Publication
2009 FOURTH INTERNATIONAL CONFERENCE ON SOFTWARE ENGINEERING ADVANCES (ICSEA 2009)

Abstract
Knowledge plays a key role in software development, and the effectiveness of how it is captured into artifacts, and acquired by other team members, is of crucial importance to a project's success. The life-cycle of knowledge in software development is derived from the adopted artifacts, practices and tools. These axes are here reviewed from a knowledge capture and acquisition perspective, and several open research issues are identified. The present work is being carried out in the context of the author's doctoral research. The research objectives are derived from the presented open issues, and a research strategy is outlined. Some preliminary results are also presented.

2009

Produtividade, Sociedade, Ciência e Política

Authors
Vasconcelos-Raposo, J;

Publication
Motricidade

Abstract

2009

Interaction Engineering Using the IVY Tool

Authors
Campos, JC; Harrison, MD;

Publication
EICS'09: PROCEEDINGS OF THE ACM SIGCHI SYMPOSIUM ON ENGINEERING INTERACTIVE COMPUTING SYSTEMS

Abstract
This paper is concerned with support for the process of usability engineering. The aim is to use formal techniques to provide a systematic approach that is more traceable, and because it is systematic, repeatable. As a result of this systematic process some of the more subjective aspects of the analysis can be removed. The technique explores exhaustively those features of a specific design that fail to satisfy a set of properties. It also analyzes those aspects of the design where it is possible to quantify the cost of use. The method is illustrated using the example of a medical device. While many aspects of the approach and its tool support have already been discussed elsewhere, this paper builds on and contrasts an analysis of the same device provided by a third party and in so doing enhances the IVY tool.

2009

Unbalanced FIFO sorting for FPGA-based systems

Authors
Marcelino, R; Neto, HC; Cardoso, JMP;

Publication
16th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2009, Yasmine Hammamet, Tunesia, 13-19 December, 2009

Abstract
Sorting is an important operation in a myriad of applications. It can contribute substantially to the overall execution time of an application. Dedicated sorting architectures can be used to accelerate applications and/or to reduce energy consumption. In this paper, we propose an efficient sorting unit aiming at acceleratin. The sort operation in FPGA-based embedded systems. The proposed sorting unit, named Unbalanced FIFO Merge Sorting Unit, is based on a FIFO merger implementation and is easily scalable to handle different data-set sizes. We show results oy the proposed sorting unit when isolated and when integrated in a software/hardware solution. When using a Xilinx Virtex-5 SX50T FPGA device. The logic resources for a 32 Kword machine is lower than 1%, an. The block RAM usage is about 22%. When compared to a quicksort pure software implementation, our Sorting Unit provides speed-ups from 1.2× to 50× and about 20× when isolated and when integrated in a software/hardware solution, respectively. © 2009 IEEE.

  • 3861
  • 4503