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About

Vítor Grade Tavares earned his undergraduate and MSc degrees from the University of Aveiro, Portugal, and the Ph.D. degree from the Computational NeuroEngineering Laboratory, University of Florida, Gainesville, USA, in 2001, all in electrical engineering. He is currently an Assistant Professor at University of Porto and Senior Researcher at INESC-TEC, Porto. In 2010 he was a Visiting Professor at Carnegie Mellon University, USA. His research interests include low-power, mixed-signal and neuromorphic integrated-chip design and biomimetic computing, CMOS RF integrated circuit design for wireless sensor networks, and transparent electronics. He has coordinated several national projects, and also locally coordinated European projects. Most recent awards include co-recipient for the student best-paper award of the IEEE ICUWB 2014 and first place on TSMC design context in 90nm LP MS/RF in 2009. He was also awarded with a certificate of appreciation for contributions towards the advancement of IEEE and the Engineering Professions as Chair of the Education Society Chapter - Portugal section, which he co-founded.

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Publications

2021

A Neural Network Approach towards Generalized Resistive Switching Modelling

Authors
Carvalho, G; Pereira, M; Kiazadeh, A; Tavares, VG;

Publication
MICROMACHINES

Abstract
Resistive switching behaviour has been demonstrated to be a common characteristic to many materials. In this regard, research teams to date have produced a plethora of different devices exhibiting diverse behaviour, but when system design is considered, finding a 'one-model-fits-all' solution can be quite difficult, or even impossible. However, it is in the interest of the community to achieve more general modelling tools for design that allows a quick model update as devices evolve. Laying the grounds with such a principle, this paper presents an artificial neural network learning approach to resistive switching modelling. The efficacy of the method is demonstrated firstly with two simulated devices and secondly with a 4 mu m(2) amorphous IGZO device. For the amorphous IGZO device, a normalized root-mean-squared error (NRMSE) of 5.66 x 10(-3) is achieved with a [2, 50,50 ,1] network structure, representing a good balance between model complexity and accuracy. A brief study on the number of hidden layers and neurons and its effect on network performance is also conducted with the best NRMSE reported at 4.63 x 10(-3). The low error rate achieved in both simulated and real-world devices is a good indicator that the presented approach is flexible and can suit multiple device types.

2020

Rail-to-Rail Timing Signals Generation Using InGaZnO TFTs For Flexible X-Ray Detector

Authors
Bahubalindruni, PG; Tiwari, B; Pereira, M; Santa, A; Martins, J; Rovisco, A; Tavares, V; Martins, R; Fortunato, E; Barquinha, P;

Publication
IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY

Abstract
This paper reports on-chip rail-to-rail timing signals generation thin-film circuits for the first time. These circuits, based on a-IGZO thin-film transistors (TFTs) with a simple staggered bottom gate structure, allow row and column selection of a sensor matrix embedded in a flexible radiation sensing system. They include on-chip clock generator (ring oscillator), column selector (shift register) and row-selector (a frequency divider and a shift register). They are realised with rail-to-rail logic gates with level-shifting ability that can perform inversion and NAND logic operations. These logic gates are capable of providing full output swing between supply rails, $V_{DD}$ and $V_{SS}$ , by introducing a single additional switch for each input in bootstrapping logic gates. These circuits were characterised under normal ambient atmosphere and show an improved performance compared to the conventional logic gates with diode connected load and pseudo CMOS counterparts. By using these high-performance logic gates, a complete rail-to-rail frequency divider is presented from measurements using D-Flip Flop. In order to realize a complete compact system, an on-chip ring oscillator (output clock frequency around 1 kHz) and a shift register are also presented from simulations, where these circuits show a power consumption of 1.5 mW and 0.82 mW at a supply voltage of 8 V, respectively. While the circuit concepts described here were designed for an X-ray sensing system, they can be readily expanded to other domains where flexible on-chip timing signal generation is required, such as, smart packaging, biomedical wearable devices and RFIDs.

2020

A Multifunctional Integrated Circuit Router for Body Area Network Wearable Systems

Authors
Miyandoab, FD; Ferreira, JC; Tavares, VMG; da Silva, JM; Velez, FJ;

Publication
IEEE/ACM Transactions on Networking

Abstract

2020

Hardware architecture for integrate-and-fire signal reconstruction on FPGA

Authors
Carvalho, G; Ferreira, JC; Tavares, VG;

Publication
2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)

Abstract

2020

IMPORTANCE OF EMPLOYER BRANDING FOR THE SUCCESS OF THE CORPORATE BRAND IN THE SME CONTEXT

Authors
Santos, JL; Tavares, V;

Publication
PROCEEDINGS OF THE INTERNATIONAL CONFERENCE OF APPLIED BUSINESS AND MANAGEMENT (ICABM2020)

Abstract
Purpose: The purpose of this paper is to present the results of a research on the importance of Employer Branding (EB) for corporate brand success in the context of small and medium businesses (SME), from the perspective of the employees compared to the founders, considering a set of stable variables. This is an ongoing process through which company employees want to understand "who" and "what" is behind the brand's value proposition. Methodology: A qualitative methodology was used based on interviews with open questions in an exploratory case study, to gather as much information as possible and without constraints. This was properly supported by a literature review, from published works, academic works, as well as papers on employer branding. This approach is part of the scientific paradigm of realism, also known as critical realism, and is therefore an appropriate method in marketing and management research. Findings: The findings of this research demonstrate that EB seems not to be contributing for a successful corporate brand in the SME context. For that purpose, a medium-and long-term marketing and communication plan is needed, particularly regarding a brand plan, duly defined and implemented. The mere market/sector leadership cannot be viewed as a source in the long run for SME. If no one believes or bets on brand equity appreciation, EB won't certainly be potentiated. In this way, there is a risk that this type of organizations would become weak entities with no sense of belonging. Originality/value: Because there is a lack of applied scientific research on this topic in the context of SME, the aim was to understand EB from a specific case study, enabling the acquisition of knowledge on how this concept works and is applied (or not) in practice. Practical implications: This research aimed at contributing to a better strategic alignment of EB, from the institutional level to the operational level, passing through the intermediate level, in SME. It appears that the managers/administrators/directors in SME don't have a holistic perspective of the brand. It also emphasizes the great importance of employees in building the brand in this particular context. Research limitations: This investigation needed a deeper market analysis, namely of direct competitors. It was not possible to obtain enough information to carry out a more reliable analysis. It would be very interesting to understand what led some collaborators to leave the studied company and move to its direct competitors, as well as to realize what makes others leave the competitors or return to the company.

Supervised
thesis

2021

Memristor based logic circuits

Author
Luís Diogo de Almeida Outeiro

Institution
UP-FEUP

2021

Reciclagem de potência para um transmissor RF sem fios

Author
Bruno Miguel Gonçalves Saraiva

Institution
UP-FEUP

2021

Cellular Neural Networks design for sensor networks.

Author
João Luís Fernandes Ferreira

Institution
UP-FEUP

2021

Power Recycled Combiner for RF Wireless Transmitter

Author
Bruno Miguel Gonçalves Saraiva

Institution
UP-FEUP

2021

Projeto de circuitos lógicos com recurso a Memristors.

Author
Luís Diogo de Almeida Outeiro

Institution
UP-FEUP