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About

Vítor Grade Tavares earned his undergraduate and MSc degrees from the University of Aveiro, Portugal, and the Ph.D. degree from the Computational NeuroEngineering Laboratory, University of Florida, Gainesville, USA, in 2001, all in electrical engineering. He is currently an Assistant Professor at University of Porto and Senior Researcher at INESC-TEC, Porto. In 2010 he was a Visiting Professor at Carnegie Mellon University, USA. His research interests include low-power, mixed-signal and neuromorphic integrated-chip design and biomimetic computing, CMOS RF integrated circuit design for wireless sensor networks, and transparent electronics. He has coordinated several national projects, and also locally coordinated European projects. Most recent awards include co-recipient for the student best-paper award of the IEEE ICUWB 2014 and first place on TSMC design context in 90nm LP MS/RF in 2009. He was also awarded with a certificate of appreciation for contributions towards the advancement of IEEE and the Engineering Professions as Chair of the Education Society Chapter - Portugal section, which he co-founded.

Interest
Topics
Details

Details

008
Publications

2019

IC Protection Against JTAG-based Attacks

Authors
Ren, XL; Torres, FP; Blanton, RD; Tavares, VG;

Publication
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Abstract
Security is now becoming a well-established challenge for integrated circuits (ICs). Various types of IC attacks have been reported, including reverse engineering IPs, dumping on-chip data, and controlling/modifying IC operation. IEEE 1149.1, commonly known as JTAG (Joint Test Action Group), is a standard for providing test access to an IC. JTAG is primarily used for IC manufacturing test, but also for in-field debugging and failure analysis since it gives access to internal sub-systems of the IC. Because the JTAG needs to be left intact and operational after fabrication, it inevitably provides a “backdoor” that can be exploited outside its intended use. This work proposes machine learning based approaches to detect illegitimate use of the JTAG. Specifically, JTAG operation is characterized using various features that are then classified as either legitimate or attack. Experiments using the OpenSPARC T2 platform demonstrate that the proposed approaches can classify legitimate JTAG operation and known attacks with significantly high accuracy. Experiments also demonstrate that unknown and disguised attacks can be detected with high accuracy as well (99% and 94%, respectively). IEEE

2019

Wearable sensor networks for human gait

Authors
Machado da Silva, J; Derogarian, F; Canas Ferreira, J; Grade Tavares, V;

Publication
Wearable Technologies and Wireless Body Sensor Networks for Healthcare

Abstract

2019

A precise low power and hardware-efficient time synchronization method for wearable systems

Authors
Derogarian, F; Canas Ferreira, J; Grade Tavares, V; Machado da Silva, J; Velez, FJ;

Publication
Wearable Technologies and Wireless Body Sensor Networks for Healthcare

Abstract

2019

A reliable wearable system for BAN applications with a high number of sensors and high data rate

Authors
Derogarian, F; Canas Ferreira, J; Grade Tavares, V; Machado da Silva, J; Velez, FJ;

Publication
Wearable Technologies and Wireless Body Sensor Networks for Healthcare

Abstract

2019

System-level study on impulse-radio integration-and-fire (IRIF) transceiver

Authors
Kianpour, I; Hussain, B; Mendonca, HS; Tavares, VG;

Publication
AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS

Abstract
Integrate-and-fire (IFN) model of a biological neuron is an amplitude-to-time conversion technique that encodes information in the time-spacing between action potentials (spikes). In principle, this encoding scheme can be used to modulate signals in an impulse radio ultra wide-band (IR-UWB) transmitter, making it suitable for low-power applications, such as in wireless sensor networks (WSN) and biomedical monitoring. This paper then proposes an architecture based on IFN encoding method applied to a UWB transceiver scenario, referred to herein as impulse-radio integrate-and-fire (IRIF) transceiver, followed by a system-level study to attest its effectiveness. The transmitter is composed of an integrate-and-fire modulator, a digital controller and memory block, followed by a UWB pulse generator and filter. At the receiver side, a low-noise amplifier, a squarer, a low-pass filter and a comparator form an energy-detection receiver. A processor reconstructs the original signal at the receiver, and the quality of the synthesized signal is then verified in terms of effective number of bits (ENOB). Finally, a link budget is performed. (C) 2019 Published by Elsevier GmbH.

Supervised
thesis

2017

Operation and reconstruction of signals based on integrate-and-fire conversion using FPGA

Author
Guilherme Luis Leitão Teixeira Guia de Carvalho

Institution
UP-FEUP

2017

CMOS RF Sigma-Delta Converter

Author
Luís Filipe Brochado Reis

Institution
UP-FEUP

2016

Integrated Systems Security through User Behavior and System Activity Analyzes via Machine Learning

Author
Xuanle Ren

Institution
UP-FEUP

2016

Inductorless DC\DC converter

Author
Fábio Miguel Ferreira Pascoal

Institution
UP-FEUP

2015

Self calibrated current reference

Author
Bruno Miguel da Silva Teixeira

Institution
UP-FEUP