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Sobre

Sobre

Vítor Grade Tavares obteve a sua licenciatura e mestrado pela Universidade de Aveiro, Portugal, e o doutoramento no Computational NeuroEngineering Laboratory, University of Florida, Gainesville, USA, em 2001, ambos em engenharia eletrotécnica. É atualmente Professor Auxiliar na Universidade do Porto e Investigador Sénior do INESC-TEC, Porto. Em 2010 foi Professor Visitante na Carnegie Mellon University, EUA. Os seus interesses de investigação incluem desenho de circuitos integrados de baixa potência, de sinal misto e computação neuro-mórfica e bio-mimética, projeto de circuitos integrados CMOS RF para redes de sensores sem fio e eletrónica transparente. Tem coordenado vários projetos nacionais, bem como tem coordenado localmente projetos europeus. Os prêmios mais recentes incluem codestinatário do prêmio de melhor artigo no IEEE ICUWB 2014 e primeiro lugar no concurso de desenho TSMC em 90nm LP MS / RF em 2009. Também foi premiado com um certificado de agradecimento por contribuições para o avanço do IEEE e das Profissões de Engenharia como Presidente da secção da Sociedade de Educação - Portugal, que cofundou.

Tópicos
de interesse
Detalhes

Detalhes

008
Publicações

2019

IC Protection Against JTAG-based Attacks

Autores
Ren, XL; Torres, FP; Blanton, RD; Tavares, VG;

Publicação
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Abstract
Security is now becoming a well-established challenge for integrated circuits (ICs). Various types of IC attacks have been reported, including reverse engineering IPs, dumping on-chip data, and controlling/modifying IC operation. IEEE 1149.1, commonly known as JTAG (Joint Test Action Group), is a standard for providing test access to an IC. JTAG is primarily used for IC manufacturing test, but also for in-field debugging and failure analysis since it gives access to internal sub-systems of the IC. Because the JTAG needs to be left intact and operational after fabrication, it inevitably provides a “backdoor” that can be exploited outside its intended use. This work proposes machine learning based approaches to detect illegitimate use of the JTAG. Specifically, JTAG operation is characterized using various features that are then classified as either legitimate or attack. Experiments using the OpenSPARC T2 platform demonstrate that the proposed approaches can classify legitimate JTAG operation and known attacks with significantly high accuracy. Experiments also demonstrate that unknown and disguised attacks can be detected with high accuracy as well (99% and 94%, respectively). IEEE

2018

Detection of IJTAG attacks using LDPC-based feature reduction and machine learning

Autores
Ren, XL; Blanton, RDS; Tavares, VG;

Publicação
Proceedings of the European Test Workshop

Abstract
IEEE 1687 standard (IJTAG), as an extension to the IEEE 1149.1, facilitates efficient access to embedded instruments by supporting reconfigurable scan networks. Specifically, IJTAG allows each IP to be wrapped by a test data register (TDR) whose access is controlled by a segment insertion bit (SIB) or a scan-mux control bit (SCB). Because the TDRs and the SIB/SCB network are typically not public, but critical for accessing embedded instruments, they might be used for illegitimate purposes, such as dumping credential data and reverse engineering IP design. Machine learning has been proposed to detect such attacks, but the large number of instruments and parallel execution enabled by the IJTAG produce high-dimensional data, which poses a challenge to on-chip detection. In this paper, we propose to reduce the high-dimensional but sparse data using a low-density parity-check (LDPC) matrix. Experiments using a modified version of the OpenSPARC T2 to include IJTAG functionality demonstrate that the use of feature reduction eliminates 91% of the features, leading to 43% reduction in circuit size without affecting detection accuracy. Also, the on-chip detector adds moderate overhead (~ 8%) to the IJTAG. © 2018 IEEE.

2018

High-Gain Transimpedance Amplifier for Flexible Radiation Dosimetry Using InGaZnO TFTs

Autores
Bahubalindruni, PG; Martins, J; Santa, A; Tavares, V; Martins, R; Fortunato, E; Barquinha, P;

Publicação
IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY

Abstract
This paper presents a novel high-gain transimpedance amplifier for flexible radiation sensing systems that can be used as large-area dosimeters. The circuit is implemented with indium-gallium-zinc-oxide thin-film-transistors and uses two stages for the amplification of the sensor signal (current). The first stage consists of cascode current mirrors with a diode connected load that performs current amplification and voltage conversion. Then, the first stage is followed by a voltage amplifier based on a positive feedback topology for gain enhancement. The proposed circuit converts nano-ampere (10 nA) currents into hundreds of millivolts (280 mV), showing a gain around 149 dB and a power consumption of 0.45 mW. The sensed radiation dose level, in voltage terms, can drive the next stages in the radiation sensing system, such as analog to digital converters. These radiation sensing devices can find potential applications in real-time, large area, flexible health, and security systems.

2018

A High Speed Programmable Ring Oscillator Using InGaZnO Thin-Film Transistors

Autores
Tiwari, B; Martins, J; Kalla, S; Kaushik, S; Santa, A; Bahubalindruni, PG; Tavares, VG; Barquinha, P;

Publicação
2018 International Flexible Electronics Technology Conference (IFETC)

Abstract

2018

Analysis and Evaluation of anEnergy-Efficient Routing Protocol for WSNsCombining Source Routing and MinimumCost Forwarding

Autores
Miyandoab, FD; Ferreira, JC; Tavares, VMG; Instituto de Telecomunicações and DEM, Universidade da Beira Interior, Faculdade de Engenharia, Portugal,; INESC TEC, Faculdade de Engenharia da Universidade do Porto, Portugal,; INESC TEC, Faculdade de Engenharia da Universidade do Porto, Portugal,;

Publicação
Journal of Mobile Multimedia

Abstract

Teses
supervisionadas

2017

Operation and reconstruction of signals based on integrate-and-fire conversion using FPGA

Autor
Guilherme Luis Leitão Teixeira Guia de Carvalho

Instituição
UP-FEUP

2017

CMOS RF Sigma-Delta Converter

Autor
Luís Filipe Brochado Reis

Instituição
UP-FEUP

2016

Integrated Systems Security through User Behavior and System Activity Analyzes via Machine Learning

Autor
Xuanle Ren

Instituição
UP-FEUP

2016

Inductorless DC\DC converter

Autor
Fábio Miguel Ferreira Pascoal

Instituição
UP-FEUP

2015

Self calibrated current reference

Autor
Bruno Miguel da Silva Teixeira

Instituição
UP-FEUP