Abstract
Preemptions via virtual channels have been proposed as a means to introduce the notion of priorities and real-time concepts in wormhole-switched NoC-based architectures. This work presents a holistic approach, which utilises a novel three-staged mapping method in order to assess what should be the physical characteristics of the platform (and its interconnect), such that real-time guarantees can be provided, assuming a given workload. We estimate the "gap" between platform characteristics required for the real-time analysis and those of currently available many-core platforms and propose to employ the existing feature of many-core platforms in order to significantly reduce this gap. The experiments demonstrate that virtual channels, an essential prerequisite for the real-time analysis, are not the bottle-neck. The approach presented in this paper can help system designers to select/design the most suitable platform for a given workload, such that all temporal constraints are met and over-dimensioning is avoided. © 2013 ACM.

Abstract
Multi-core platforms are challenging the way software is developed, in all application domains. For the particular case of real-time systems, models for the development of parallel software must be able to be shown correct in both functional and non-functional properties at design-time. In particular, issues such as concurrency, timing behaviour and interaction with the environment need to be addressed with the same caution as for the functional requirements. This paper proposes an execution model for the parallelization of real-time software, based upon a fine-grained parallelism support being proposed to Ada, a programming language particularly suited to the development of critical, concurrent software. We also show the correctness of the proposed model in terms of satisfying constraints related to execution order and unbounded priority inversions. © 2013 ACM.

Abstract
The increased presence of parallel computing platforms brings concerns to the general purpose domain that were previously prevalent only in the specific niche of high-performance computing. As parallel programming technologies become more prevalent in the form of new emerging programming languages and extensions of existing languages, additional safety concerns arise as part of the paradigm shift from sequential to parallel behaviour. In this paper, we propose various syntax extensions to the Ada language, which provide mechanisms whereby the compiler is given the necessary semantic information to enable the implicit and explicit parallelization of code. The model is based on earlier work, which separates parallelism specification from concurrency implementation, but proposes an updated syntax with additional mechanisms to facilitate the development of safer parallel programs. Copyright 2014 ACM.

Abstract
The recent technological advancements and market trends are causing an interesting phenomenon towards the convergence of High-Performance Computing (HPC) and Embedded Computing (EC) domains. Many recent HPC applications require huge amounts of information to be processed within a bounded amount of time while EC systems are increasingly concerned with providing higher performance in real-time. The convergence of these two domains towards systems requiring both high performance and a predictable time-behavior challenges the capabilities of current hardware architectures. Fortunately, the advent of next-generation many-core embedded platforms has the chance of intercepting this converging need for predictability and high-performance, allowing HPC and EC applications to be executed on efficient and powerful heterogeneous architectures integrating general-purpose processors with many-core computing fabrics. However, addressing this mixed set of requirements is not without its own challenges and it is now of paramount importance to develop new techniques to exploit the massively parallel computation capabilities of many-core platforms in a predictable way. © Vincent Nélis, Patrick Meumeu Yomsi, Luís Miguel Pinho, José Carlos Fonseca, Marko Bertogna, Eduardo Quiñones, Roberto Vargas, and Andrea Marongiu.

Abstract
Recently, a semantic and runtime model for parallel programming was proposed for addition to Ada. The proposal uses program annotations (expressed as Ada 2012 aspects) to inform the compiler of opportunities for parallel computation, and also offers the ability to specify details of parallel execution. The proposal includes support for specialized behaviors via dedicated libraries and a runtime environment that builds on pools of worker tasks. This paper extends that work by adding notations for data types and parallel blocks, simplifying some of the parallel notations and eliminating obstructions to the implementation of efficient parallel algorithms. © 2014 Springer International Publishing.

Abstract
The IEC 61499 standard provides an executable model for distributed control systems in terms of interacting function blocks. However, the current IEC 61499 standard lacks appropriate timing semantics for the specification of timing requirements, reasoning on timing properties at the model level, and for the timing verification of a specific deployment. In this paper we address this fundamental shortcoming by proposing Real-Time-4-FUN, a real-time semantics for IEC 61499. The key property is the preservation of non-determinism, allowing us to reason on (and verify) timing properties at the model level without assuming any specific scheduling policy or stipulating specific order of execution for the deployment. This provides for a clear separation of concerns, where the designer can focus on properties of the application prior to, and separately from, deployment verification. The proposed timing semantics is backwards compatible to the current standard, thus allow for reuse of existing designs. The transitional property allows timing requirements to propagate to downstream sub-systems, and can be utilized for scheduling both at device and network level. Based on a translation to RTFM-tasks and resources, IEC 61499 models can be analyzed, compiled and executed. As a proof of concept the timing semantics has been experimentally implemented in the RTFM-core language and the accompanying (thread based) RTFM-RT run-time system.