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Publications

Publications by José Silva Matos

1997

Using power supply current monitoring and P1149.4 for parametric testing of passive components

Authors
Machado da Silva, J; Silva Matos, J;

Publication
Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97

Abstract

1997

Implementation and evaluation of mixed current / voltage testing using the IEEE P1149.4 infrastructure

Authors
Da Silva, JM; Alves, JC; Matos, JS;

Publication
IEE Colloquium (Digest)

Abstract
This paper presents experiments carried out with a prototype test chip provided by the IEEE P1149.4 Mixed-Signal Testing Working Group, which explore the architecture of the proposed analogue boundary module to implement simultaneous observation of power supply current and output voltage, towards mixed current/voltage testing of analogue and mixed-signal circuits.

1997

ProHos-1 - A vector processor for the efficient estimation of higher-order moments

Authors
Alves, JC; Puga, A; CorteReal, L; Matos, JS;

Publication
VECTOR AND PARALLEL PROCESSING - VECPAR'96

Abstract
Higher-order statistics (HOS) are a powerful analysis tool in digital signal processing. The most difficult task to use it effectively is the estimation of higher-order moments of sampled data, taken from real systems. For applications that require real-time processing, the performance achieved by common microprocessors or digital signal processors is not good enough to carry out the large number of calculations needed for their estimation. This paper presents ProHos-1, an experimental vector processor for the estimation of the higher-order moments up to the fourth-order. The processor's architecture exploits the structure of the algorithm, to process in parallel four vectors of the input data in a pipe-lined fashion, executing the equivalent to 11 operations in each clock cycle. The design of dedicated control circuits led to high clock rate and small hardware complexity, thus suitable for implementation as an ASIC (Application Specific integrated Circuit).

1999

Computer organisation, programming and benchmarking: Introduction

Authors
Matos, JS;

Publication
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Abstract

1999

Computer organisation, programming and benchmarking - Introduction

Authors
Matos, JS;

Publication
VECTOR AND PARALLEL PROCESSING - VECPAR'98

Abstract

2000

Mixed-signal BIST using correlation and reconfigurable hardware

Authors
Machado Da Silva, J; Duarte, JS; Matos, JS;

Publication
Proceedings -Design, Automation and Test in Europe, DATE

Abstract
Reducing the area overhead required by BIST structures can be achieved by reconfiguring existing hardware to perform test related control and processing functions. This work shows how the resources required for these operations can be implemented in-circuit, taking advantage of programmable logic available in the system. Structural and functional tests are performed using correlation to obtain iDD and uOUT cross-correlation signatures, and to measure gain, phase, and total harmonic distortion. © 2000 IEEE.

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