Abstract
This chapter presents the most relevant related work with respect to the compilation and synthesis approach developed in the context of the REFLECT project. We survey current techniques and methodologies for the mapping of computations described in high-level programming languages to reconfigurable architectures. We give particular emphasis to compilation systems that map imperative (C-like) languages to target FPGA-based systems. We also describe previous work on compiler optimizations, automated high-level synthesis, and strategies for back-end synthesis, mapping as well as placement and routing. Finally, we include an overview of EU-funded projects relevant to REFLECT. © Springer Science+Business Media New York 2013. All rights are reserved.

Abstract
Source-to-source weaving is a key mechanism in the REFLECT design-flow since it allows the inclusion of application-specific information in the transformed program. In particular, LARA [1, 2] aspects are used to control the design-flow, and to trigger source-to-source code transformations and compilation/synthesis optimizations on a given application. Hence, user knowledge about an application and/or target architecture can be codified as aspects, allowing the original application code to be automatically extended to satisfy non-functional concerns, such as arithmetic precision and performance. © Springer Science+Business Media New York 2013. All rights are reserved.

Abstract
This book provides techniques to tackle the design challenges raised by the increasing diversity and complexity of emerging, heterogeneous architectures for embedded systems. It describes an approach based on techniques from software engineering called aspect-oriented programming, which allow designers to control today's sophisticated design tool chains, while maintaining a single application source code. Readers are introduced to the basic concepts of an aspect-oriented, domain specific language that enables control of a wide range of compilation and synthesis tools in the partitioning and mapping of an application to a heterogeneous (and possibly multi-core) target architecture. Several examples are presented that illustrate the benefits of the approach developed for applications from avionics and digital signal processing. Using the aspect-oriented programming techniques presented in this book, developers can reuse extensive sections of their designs, while preserving the original application source-code, thus promoting developer productivity as well as architecture and performance portability. Describes an aspect-oriented approach for the compilation and synthesis of applications targeting heterogeneous embedded computing architectures. Includes examples using an integrated tool chain for compilation and synthesis. Provides validation and evaluation for targeted reconfigurable heterogeneous architectures. Enables design portability, given changing target devices. Allows developers to maintain a single application source code when targeting multiple architectures. © Springer Science+Business Media New York 2013. All rights are reserved.

Abstract
This book presents research and development achievements regarding a design-flow approach where specifications for design decisions, monitorization, compilation, synthesis, mapping, and design patterns are first class entities that complement the application source code. The contents of this book reflects 3 years of structural improvements regarding a high-level design-flow and a domain-specific language - LAnguage for Reconfigurable Architectures (LARA) - designed to facilitate the mapping of applications to multi-core and heterogeneous embedded computing systems. © Springer Science+Business Media New York 2013. All rights are reserved.

Abstract
In this article, we focus on the acceleration of a chemical reaction simulation that relies on a system of stiff ordinary differential equation (ODEs) targeting heterogeneous computing systems with CPUs and field-programmable gate arrays (FPGAs). Specifically, we target an essential kernel of the coupled chemistry aerosol-tracer transport model to the Brazilian developments on the regional atmospheric modeling system (CCATT-BRAMS). We focus on a linear solve step using the QR factorization based on the modified Gram-Schmidt method as the basis of the ODE solver in this application. We target Intel hardware accelerator research program (HARP) architecture with the OpenCL programming environment for these early experiments. Our design exploration reveals a hardware design that is up to 4 times faster than the original iterative Jacobi method used in this solver. Still, even with hardware support, the overall performance of our QR-based hardware is lower than its original software version.

Abstract