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Publications

Publications by CTM

2020

A Dynamically Reconfigurable Dual-Waveform Baseband Modulator for Flexible Wireless Communications

Authors
Ferreira, ML; Ferreira, JC;

Publication
JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY

Abstract
In future wireless communication systems, several radio access technologies will coexist and interwork to provide a great variety of services with different requirements. Thus, the design of flexible and reconfigurable hardware is a relevant topic in wireless communications. The combination of high performance, programmability and flexibility makes Field-programmable gate array a convenient platform to design such systems, especially for base stations. This paper describes a dynamically reconfigurable baseband modulator for Orthogonal Frequency Division Multiplexing and Filter-bank Multicarrier modulation waveforms implemented on a Virtex-7 board. The design features Dynamic Partial Reconfiguration (DPR) capabilities to adapt its mode of operation at run-time and is compared with a functionally equivalent static multi-mode design regarding processing throughput, resource utilization, functional density and power consumption. The DPR-based design implementation reserves about half the resources used by static multi-mode counterpart. Consequently, the baseband processing dynamic power consumption observed in the DPR-based design is between 26 mW to 90 mW lower than in the static multi-mode design, representing a dynamic power reduction between 13% to 52%. The worst-case DPR latency measured was 1.051 ms, while the DPR energy overhead is below 1.5 mJ. Considering latency requirements for modern wireless standards and power consumption constraints for commercial base stations, the DPR application is shown to be valuable in multi-standard and multi-mode systems, as well as in scenarios such as multiple-input and multiple-output or dynamic spectrum aggregation.

2020

Parallel Implementation of K-Means Algorithm on FPGA

Authors
Dias, LA; Ferreira, JC; Fernandes, MAC;

Publication
IEEE ACCESS

Abstract
The K-means algorithm is widely used to find correlations between data in different application domains. However, given the massive amount of data stored, known as Big Data, the need for high-speed processing to analyze data has become even more critical, especially for real-time applications. A solution that has been adopted to increase the processing speed is the use of parallel implementations on FPGA, which has proved to be more efficient than sequential systems. Hence, this paper proposes a fully parallel implementation of the K-means algorithm on FPGA to optimize the system & x2019;s processing time, thus enabling real-time applications. This proposal, unlike most implementations proposed in the literature, even parallel ones, do not have sequential steps, a limiting factor of processing speed. Results related to processing time (or throughput) and FPGA area occupancy (or hardware resources) were analyzed for different parameters, reaching performances higher than 53 millions of data points processed per second. Comparisons to the state of the art are also presented, showing speedups of more than over a partially serial implementation.

2020

Improving performance and energy consumption in embedded systems via binary acceleration: A survey

Authors
Paulino, N; Ferreira, JC; Cardoso, JMP;

Publication
ACM Computing Surveys

Abstract
The breakdown of Dennard scaling has resulted in a decade-long stall of the maximum operating clock frequencies of processors. To mitigate this issue, computing shifted to multi-core devices. This introduced the need for programming flows and tools that facilitate the expression of workload parallelism at high abstraction levels. However, not all workloads are easily parallelizable, and the minor improvements to processor cores have not significantly increased single-threaded performance. Simultaneously, Instruction Level Parallelism in applications is considerably underexplored. This article reviews notable approaches that focus on exploiting this potential parallelism via automatic generation of specialized hardware from binary code. Although research on this topic spans over more than 20 years, automatic acceleration of software via translation to hardware has gained new importance with the recent trend toward reconfigurable heterogeneous platforms. We characterize this kind of binary acceleration approach and the accelerator architectures on which it relies. We summarize notable state-of-the-art approaches individually and present a taxonomy and comparison. Performance gains from 2.6× to 5.6× are reported, mostly considering bare-metal embedded applications, along with power consumption reductions between 1.3× and 3.9×. We believe the methodologies and results achievable by automatic hardware generation approaches are promising in the context of emergent reconfigurable devices. © 2020 Association for Computing Machinery.

2020

Height Optimization in Aerial Networks for Enhanced Broadband Communications at Sea

Authors
Teixeira, FB; Campos, R; Ricardo, M;

Publication
IEEE Access

Abstract

2020

On the Reproduction of Real Wireless Channel Occupancy in ns-3

Authors
Cruz, R; Fontes, H; Ruela, J; Ricardo, M; Campos, R;

Publication
CoRR

Abstract

2020

Learning Physics Through Online Video Annotations

Authors
Marcal, J; Borges, MM; Viana, P; Carvalho, P;

Publication
EDUCATION IN THE KNOWLEDGE SOCIETY

Abstract
The support of video in the learning environment is nowadays used to many ends, for either for demonstration, research or share. It is intended to reinforce the space before and after class and introduce a new dynamic and interaction in the classroom itself. Pedagogical Innovation may be achieved by different approaches to motivate students and obtain better results. The Audiovisual didactic content has been in recent years disseminated, in the Physics domain, mainly through YouTube platform. Many aspects of video production activities can increase students' self-esteem, increase their satisfaction with the learning experience, promote a positive attitude towards the subject, provide students with lower level of understanding with a broad individual tutoring, encouraging students to discuss with each other, exchange their opinions, and compare the results of lab activities. On the other hand, video can support research activities, offering the researcher access to a rich data aggregation to investigate the learning processes. This paper presents a revision of the literature about the potential of using video annotation in the education context and, perspectives of teachers' use of collaborative annotation systems, to promote reflection, specifically in the domain of Physics, using an open source annotation tool. The creation of audiovisual references, either for quick access to parts of organized video annotated content by the teacher, knowledge building or revision by and for other students is analyzed. This study is complemented with a testbed, showing the potential of using audiovisual annotated content, within a k-12 context. Students were invited to select video content, annotate, organize and publish the annotations, which could support the learning process in the domain of Physics. Results show that most of the aspects under analysis received a positive evaluation, and students expressed a gain from oral lectures and access to new sources of learning. The only exception relates to the capacity of the approach to motivated students to the study of Physics, as most of the students did not see this methodology too much motivating. The impact of this research relates to alternative teaching / learning methods, within the Physics' domain, using online video annotation, in the support of traditional exposition and memorization methodologies.

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