Abstract
Tinting is a critical issue in communication systems, especially for synchronous communications. These show a high dependence on the clock signal purity due to errors that can be introduced into the decision process. This paper addresses the design, on a 130nm CMOS process, of a Radiation Tolerant Voltage Controlled Quartz Crystal Oscillator (VCXO), including techniques to reduce the influence of radiation and noise on its performance. The VCXO is included on a PLL designed to work within High Energy Physics (IIEP) experiments.

Abstract

Abstract
Transparent TFT technologies, with amorphous semiconductor oxides are lacking a complementary type transistor. This represents a real challenge, when the design of high-gain amplifiers are considered, without resorting to passive resistive elements. However, some solutions do exist to overcome the lack of a p-type transistor. This paper then presents a comparison analysis of two high-gain single-stage amplifier topologies using only n-type enhancement transistors. In these circuits, high gain is achieved using positive feedback for the load impedance. The comparison is carried out in terms of bandwidth, power consumption and complexity under identical bias conditions. Further, the same load impedance is used to develop a novel high-gain multiplier. All the circuits are simulated using a 0.35 mu m CMOS technology, as it is easy to test the reliability of the methods, since CMOS transistors have trustworthy models.

Abstract
This paper characterizes transparent current mirrors with n-type amorphous gallium-indium-zinc-oxide (a-GIZO) thin-film transistors (TFTs). Two-TFT current mirrors with different mirroring ratios and a cascode topology are considered. A neural model is developed based on the measured data of the TFTs and is implemented in Verilog-A; then it is used to simulate the circuits with Cadence Virtuoso Spectre simulator. The simulation outcomes are validated with the fabricated circuit response. These results show that the neural network can model TFT accurately, as well as the current mirroring ability of the TFTs.

Abstract
A high-gain amplifier topology, with all single n-type enhancement transistors, is proposed in this paper. This type of circuits are essential in transparent TFT technologies, such as GIZO and ZnO that lack complementary type transistor. All circuits were simulated using BSIM3V3 model of a 0.35 mu m CMOS technology, due to the absence of a complete electrical model for the TFTs. Results reveal that the proposed circuit promise more gain, lower power consumption and higher bandwidth than the existing solutions under identical bias conditions.

Abstract
This paper presents a new methodology to maximize the power output of Photovoltaic panels (PV), based on an adaptive duty-cycle methodology. The approach embeds the DC/DC converter characteristic in the cost function, allowing an optimization based on a single measured variable. Two cost functions, and respective learning rules, are derived. The first, more complex and comprehensive, traces the ground for the second which is less computational intensive and solves stability issues and implementation difficulties. It is also demonstrated that the system is asymptotically stable around the optimum duty-cycle, in the Lyapunov sense. Both methods are compared through simulations and deviations from the optimal solution are assessed.