2017
Authors
Pinho L.;
Publication
Ada User Journal
Abstract
2017
Authors
Pinho, Luís Miguel;
Publication
Abstract
Nowadays, the prevalence of computing systems in our lives is so ubiquitous that it would not be far-fetched to state that we live in a cyber-physical world dominated by computer systems. These systems demand for more and more computational performance to process large amounts of data from multiple data sources, some of them with guaranteed processing response times. In other words, systems are required to deliver their results within pre-defined (and sometimes extremely short) time bounds. Examples can be found for instance in intelligent transportation systems for fuel consumption reduction in cities or railway, or autonomous driving of vehicles. To cope with such performance requirements, chip designers produced chips with dozens or hundreds of cores, interconnected with complex networks on chip. Unfortunately, the parallelization of the computing activities brings many challenges, among which how to provide timing guarantees, as the timing behaviour of the system running within a many-core processor depends on interactions on shared resources that are most of the time not know by the system designer. P-SOCRATES (Parallel Software Framework for Time-Critical Many-core Systems) is an FP7 European project, which developed a novel methodology to facilitate the deployment of standardized parallel architectures for real-time applications. This methodology was implemented (based on existent models and components) to provide an integrated software development kit, the UpScale SDK, to fully exploit the huge performance opportunities brought by the most advanced many-core processors, whilst ensuring a predictable performance and maintaining (or even reducing) development costs of applications. The presentation will provide an overview of the UpScale SDK, its underlying methodology, and the results of its application on relevant industrial use-cases.
2017
Authors
Pinho, LM;
Publication
Ada User Journal
Abstract
2017
Authors
Pinho, LM;
Publication
Ada User Journal
Abstract
2017
Authors
Bernardo, MdRM;
Publication
Handbook of Research on Entrepreneurial Development and Innovation Within Smart Cities - Advances in Environmental Engineering and Green Technologies
Abstract
2017
Authors
Kurunathan, H; Severino, R; Koubaa, A; Tovar, E;
Publication
IEEE International Workshop on Factory Communication Systems - Proceedings, WFCS
Abstract
With an advancement towards the paradigm of Internet of Things (IoT), in which every device will be interconnected and communicating with each other, the field of wireless sensor networks has helped to resolve an ever-growing demand in meeting deadlines and reducing power consumption. Among several standards that provide support for IoT, the recently published IEEE 802.15.4e protocol is specifically designed to meet the QoS requirements of industrial applications. IEEE 802.15.4e provides five Medium-Access Control (MAC) behaviors, including three that target time-critical applications: Deterministic and Synchronous Multichannel Extension (DSME); Time Slotted Channel Hopping (TSCH) and Low Latency Deterministic Network (LLDN). However, the standard and the literature do not provide any worst-case bound analysis of these behaviors, thus it is not possible to effectively predict their timing performance in an application and accurately devise a network in accordance to such constraints. This paper fills this gap by contributing network models for the three time-critical MAC behaviors using Network Calculus. These models allow deriving the worst-case performance of the MAC behaviors in terms of delay and buffering requirements. We then complement these results by carrying out a thorough performance analysis of these MAC behaviors by observing the impact of different parameters. © 2017 IEEE.
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