Cookies Policy
The website need some cookies and similar means to function. If you permit us, we will use those means to collect data on your visits for aggregated statistics to improve our service. Find out More
Accept Reject
  • Menu
About
Download Photo HD

About

I'm an Associate Professor at the Department of Computer Science, Faculty of Sciences, University of Porto and a researcher at the CRACS & INESC TEC research unit.

I received my PhD degree in Computer Science from the University of Porto in 2001 and my main research topics are the Design and Implementation of Logic Programming Systems, Tabling in Logic Programming and Parallel and Distributed Computing. Another areas of interest are Inductive Logic Programming, Probabilistic Logic Programming and Deductive Databases. I'm also one of the main developers of the Yap Prolog system with particular focus on the execution models that support tabling and parallel evaluation.

I've published more than 100 refereed papers in international journals, conferences and workshops, served more than 30 events as PC chair or PC member, served the ALP Newsletter as area co-editor for the Implementations and Systems track, supervised several PhD/MSc students and had leading role in two national projects: projects STAMPA and LEAP. Currently, I also serve the ALP Board and the INForum Board as executive committee member.

Interest
Topics
Details

Details

  • Name

    Ricardo Rocha
  • Cluster

    Computer Science
  • Role

    Assistant Centre Coordinator
  • Since

    01st January 2009
001
Publications

2019

Multi-dimensional lock-free arrays for multithreaded mode-directed tabling in Prolog

Authors
Areias, M; Rocha, R;

Publication
Concurrency and Computation: Practice and Experience

Abstract

2019

A lock-free coalescing-capable mechanism for memory management

Authors
Leite, R; Rocha, R;

Publication
International Symposium on Memory Management, ISMM

Abstract
One common characteristic among current lock-free memory allocators is that they rely on the operating system to manage memory since they lack a lower-level mechanism capable of splitting and coalescing blocks of memory. In this paper, we discuss this problem and we propose a generic scheme for an efficient lock-free best-fit coalescing-capable mechanism that is able of satisfying memory allocation requests with desirable low fragmentation characteristics. © 2019 Association for Computing Machinery.

2019

LRMalloc: A Modern and Competitive Lock-Free Dynamic Memory Allocator

Authors
Leite, R; Rocha, R;

Publication
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Abstract
This paper presents LRMalloc, a lock-free memory allocator that leverages lessons of modern memory allocators and combines them with a lock-free scheme. Current state-of-the-art memory allocators possess good performance but lack desirable lock-free properties, such as, priority inversion tolerance, kill-tolerance availability, and/or deadlock and livelock immunity. LRMalloc’s purpose is to show the feasibility of lock-free memory management algorithms, without sacrificing competitiveness in comparison to commonly used state-of-the-art memory allocators, especially for concurrent multithreaded applications. © 2019, Springer Nature Switzerland AG.

2019

Memory reclamation methods for lock-free hash tries

Authors
Moreno, P; Areias, M; Rocha, R;

Publication
Proceedings - Symposium on Computer Architecture and High Performance Computing

Abstract
Hash tries are a trie-based data structure with nearly ideal characteristics for the implementation of hash maps. Starting from a particular lock-free hash map data structure, named Lock-Free Hash Tries (LFHT), we focus on solving the problem of memory reclamation without losing the lockfreedom property. We propose an approach that explores the characteristics of the LFHT structure in order to achieve efficient memory reclamation with low and well-defined memory bounds. Experimental results show that our approach obtains better results when compared with other state-of-the-art memory reclamation methods and provides a competitive and scalable hash map implementation, if compared to lock-based implementations. © 2019 IEEE.

2018

Table space designs for implicit and explicit concurrent tabled evaluation

Authors
Areias, M; Rocha, R;

Publication
THEORY AND PRACTICE OF LOGIC PROGRAMMING

Abstract
One of the main advantages of Prolog is its potential for the implicit exploitation of parallelism and, as a high-level language, Prolog is also often used as a means to explicitly control concurrent tasks. Tabling is a powerful implementation technique that overcomes some limitations of traditional Prolog systems in dealing with recursion and redundant subcomputations. Given these advantages, the question that arises is if tabling has also the potential for the exploitation of concurrency/parallelism. On one hand, tabling still exploits a search space as traditional Prolog but, on the other hand, the concurrent model of tabling is necessarily far more complex, since it also introduces concurrency on the access to the tables. In this paper, we summarize Yap's main contributions to concurrent tabled evaluation and we describe the design and implementation challenges of several alternative table space designs for implicit and explicit concurrent tabled evaluation that represent different tradeoffs between concurrency and memory usage. We also motivate for the advantages of using fixed-size and lock freedata structures, elaborate on the key role that the engine's memory allocator plays on such environments, and discuss how Yap's mode-directed tabling support can be extended to concurrent evaluation. Finally, we present our future perspectives toward an efficient and novel concurrent framework which integrates both implicit and explicit concurrent tabled evaluation in a single Prolog engine.

Supervised
thesis

2020

Lock-Free Memory Reclamation for Concurrent Hash Tries

Author
Paulo Jorge Teixeira Rosa

Institution
UP-FCUP

2019

Generic Lock-Free Memory Reclamation

Author
Pedro Carvalho Moreno

Institution
UP-FCUP

2018

Definição do mapa interno de processos na área de planeamento, investigação e desenvolvimento de uma empresa municipal

Author
Sabrina Lopes Fernandes

Institution
UP-FEUP

2018

Temporal Research Interests Discovery Using Co-Occurrence Keywords Networks

Author
Pedro Cardoso Belém

Institution
UP-FCUP

2016

Pattern Discovery in Complex Networks

Author
David Oliveira Aparício

Institution
UP-FCUP