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Detalhes

Detalhes

  • Nome

    Ricardo Rocha
  • Cluster

    Informática
  • Cargo

    Coordenador Adjunto de Centro
  • Desde

    01 janeiro 2009
001
Publicações

2019

Multi-dimensional lock-free arrays for multithreaded mode-directed tabling in Prolog

Autores
Areias, M; Rocha, R;

Publicação
Concurrency and Computation: Practice and Experience

Abstract

2019

A lock-free coalescing-capable mechanism for memory management

Autores
Leite, R; Rocha, R;

Publicação
International Symposium on Memory Management, ISMM

Abstract
One common characteristic among current lock-free memory allocators is that they rely on the operating system to manage memory since they lack a lower-level mechanism capable of splitting and coalescing blocks of memory. In this paper, we discuss this problem and we propose a generic scheme for an efficient lock-free best-fit coalescing-capable mechanism that is able of satisfying memory allocation requests with desirable low fragmentation characteristics. © 2019 Association for Computing Machinery.

2019

LRMalloc: A Modern and Competitive Lock-Free Dynamic Memory Allocator

Autores
Leite, R; Rocha, R;

Publicação
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Abstract
This paper presents LRMalloc, a lock-free memory allocator that leverages lessons of modern memory allocators and combines them with a lock-free scheme. Current state-of-the-art memory allocators possess good performance but lack desirable lock-free properties, such as, priority inversion tolerance, kill-tolerance availability, and/or deadlock and livelock immunity. LRMalloc’s purpose is to show the feasibility of lock-free memory management algorithms, without sacrificing competitiveness in comparison to commonly used state-of-the-art memory allocators, especially for concurrent multithreaded applications. © 2019, Springer Nature Switzerland AG.

2019

Memory reclamation methods for lock-free hash tries

Autores
Moreno, P; Areias, M; Rocha, R;

Publicação
Proceedings - Symposium on Computer Architecture and High Performance Computing

Abstract
Hash tries are a trie-based data structure with nearly ideal characteristics for the implementation of hash maps. Starting from a particular lock-free hash map data structure, named Lock-Free Hash Tries (LFHT), we focus on solving the problem of memory reclamation without losing the lockfreedom property. We propose an approach that explores the characteristics of the LFHT structure in order to achieve efficient memory reclamation with low and well-defined memory bounds. Experimental results show that our approach obtains better results when compared with other state-of-the-art memory reclamation methods and provides a competitive and scalable hash map implementation, if compared to lock-based implementations. © 2019 IEEE.

2018

Table space designs for implicit and explicit concurrent tabled evaluation

Autores
Areias, M; Rocha, R;

Publicação
THEORY AND PRACTICE OF LOGIC PROGRAMMING

Abstract
One of the main advantages of Prolog is its potential for the implicit exploitation of parallelism and, as a high-level language, Prolog is also often used as a means to explicitly control concurrent tasks. Tabling is a powerful implementation technique that overcomes some limitations of traditional Prolog systems in dealing with recursion and redundant subcomputations. Given these advantages, the question that arises is if tabling has also the potential for the exploitation of concurrency/parallelism. On one hand, tabling still exploits a search space as traditional Prolog but, on the other hand, the concurrent model of tabling is necessarily far more complex, since it also introduces concurrency on the access to the tables. In this paper, we summarize Yap's main contributions to concurrent tabled evaluation and we describe the design and implementation challenges of several alternative table space designs for implicit and explicit concurrent tabled evaluation that represent different tradeoffs between concurrency and memory usage. We also motivate for the advantages of using fixed-size and lock freedata structures, elaborate on the key role that the engine's memory allocator plays on such environments, and discuss how Yap's mode-directed tabling support can be extended to concurrent evaluation. Finally, we present our future perspectives toward an efficient and novel concurrent framework which integrates both implicit and explicit concurrent tabled evaluation in a single Prolog engine.

Teses
supervisionadas

2018

Aplicação Industrial de Técnicas de Análise de Desempenho de Processos

Autor
Ana Rita Oliveira e Silva

Instituição
UP-FEUP

2015

Multithreaded Tabling for Logic Programming

Autor
Miguel João Gonçalves Areias

Instituição
UP-FCUP

2015

Logic Programming Environments with Advanced Parallelism

Autor
João Pedro Barreiros Nunes dos Santos

Instituição
UP-FCUP

2015

Linear logic and coordination for parallel programing

Autor
Flávio Manuel Fernandes Cruz

Instituição
UP-FCUP

2015

Towards intelligent clinical decision support systems

Autor
Joana Sílvia Santos Côrte-Real

Instituição
UP-FCUP