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Details

  • Name

    Pedro Carvalho Moreno
  • Role

    External Research Collaborator
  • Since

    01st August 2017
001
Publications

2025

A sleek lock-free hash map in an ERA of safe memory reclamation methods

Authors
Moreno, P; Areias, M; Rocha, R;

Publication
PARALLEL COMPUTING

Abstract
Lock-free data structures have become increasingly significant due to their algorithmic advantages in multi-core cache-based architectures. Safe Memory Reclamation (SMR) is a technique used in concurrent programming to ensure that memory can be safely reclaimed without causing data corruption, dangling pointers, or access to freed memory. The ERA theorem states that any SMR method for concurrent data structures can only provide at most two of the three main desirable properties: Ease of use, Robustness, and Applicability. This fundamental trade-off influences the design of efficient lock-free data structures at an early stage. This work redesigns a previous lock-free hash map to fully exploit the properties of the ERA theorem and to leverage the characteristics of multi-core cache-based architectures by minimizing the number of cache misses, which are a significant bottleneck in multi-core environments. Experimental results show that our design outperforms the previous design, which was already quite competitive when compared against the Concurrent Hash Map design of the Intel's TBB library.

2025

On Exploring Safe Memory Reclamation Methods with a Simplified Lock-Free Hash Map Design

Authors
Moreno, P; Areias, M; Rocha, R;

Publication
EURO-PAR 2024: PARALLEL PROCESSING WORKSHOPS, PT II

Abstract
Lock-freedom offers significant advantages in terms of algorithm design, performance and scalability. A fundamental building block in software development is the usage of hash map data structures. This work extends a previous lock-free hash map to support a new simplified design that is able to take advantage of most state-of-the-art safe memory reclamation methods, thus outperforming the previous design.

2024

PoET, the Paranal solar ESPRESSO Telescope: a spatially resolved Sun in a high resolution spectrograph

Authors
Leite, I; Cabral, A; Santos, N; Silva, A; Oliveira, A; Wehbe, B; Alves, D; Martins, J; Abreu, M; Monteiro, M; Moreno, P; Gafeira, R;

Publication
GROUND-BASED AND AIRBORNE INSTRUMENTATION FOR ASTRONOMY X

Abstract
There are currently important challenges imposed by stellar noise often associated with the discovery and characterization of exoplanets similar to Earth. In particular, various physical processes occurring on the stellar photosphere modify stellar spectra, severely challenging the detection and characterization of low-mass planets. A detailed study of the Sun can be used as a spectral proxy to a better understanding of the variable noise sources present in solartype stars. By obtaining full integrations of the solar disk (sun-as-a-star observations) in combination with high resolution, spatially resolved observations of smaller areas, the acquired spectra will help in the identification of individual stellar features responsible for the observed spectral deformations. The Instituto de Astrofisica e Ciencias do Espaco (Portugal) is currently developing an instrument to approach this challenge. In conjunction with the high-resolution spectrograph ESPRESSO (spectral resolutions of R similar to 140 000 and similar to 190 000, HR and UHR modes, respectively), the Paranal solar ESPRESSO Telescope (PoET) will have two dedicated telescopes to map the Sun's surface through disk-resolved and disk-integrated measurements, with respective telescope diameters of 600 and 75 millimeters. PoET has the requirement to perform disk-resolved observations from 1 to 60 arcseconds in conjunction with the full disk. In this work, a summary of the current configuration of the system - PoET's telescopes and their frontends - will be given, as well as the preliminary assumptions made to build PoET, with consideration for the light requirements of the ESPRESSO spectrograph.

2024

Yet Another Lock-Free Atom Table Design for Scalable Symbol Management in Prolog

Authors
Moreno, P; Areias, M; Rocha, R; Costa, VS;

Publication
INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING

Abstract
Prolog systems rely on an atom table for symbol management, which is usually implemented as a dynamically resizeable hash table. This is ideal for single threaded execution, but can become a bottleneck in a multi-threaded scenario. In this work, we replace the original atom table implementation in the YAP Prolog system with a lock-free hash-based data structure, named Lock-free Hash Tries (LFHT), in order to provide efficient and scalable symbol management. Being lock-free, the new implementation also provides better guarantees, namely, immunity to priority inversion, to deadlocks and to livelocks. Performance results show that the new lock-free LFHT implementation has better results in single threaded execution and much better scalability than the original lock based dynamically resizing hash table.

2023

Releasing Memory with Optimistic Access: A Hybrid Approach to Memory Reclamation and Allocation in Lock-Free Programs

Authors
Moreno, P; Rocha, R;

Publication
PROCEEDINGS OF THE 35TH ACM SYMPOSIUM ON PARALLELISM IN ALGORITHMS AND ARCHITECTURES, SPAA 2023

Abstract
Lock-free data structures are an important tool for the development of concurrent programs as they provide scalability, low latency and avoid deadlocks, livelocks and priority inversion. However, they require some sort of additional support to guarantee memory reclamation. The Optimistic Access (OA) method has most of the desired properties for memory reclamation, but since it allows memory to be accessed after being reclaimed, it is incompatible with the traditional memory management model. This renders it unable to release memory to the memory allocator/operating system, and, as such, it requires a complex memory recycling mechanism. In this paper, we extend the lock-free general purpose memory allocator LRMalloc to support the OA method. By doing so, we are able to simplify the memory reclamation method implementation and also allow memory to be reused by other parts of the same process. We further exploit the virtual memory system provided by the operating system and hardware in order to make it possible to release reclaimed memory to the operating system.