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About

About

I received my Master's Degree from FEUP (Faculdade de Engenharia da Universidade do Porto), in Electrical and Computer Engineering. My thesis was titled Generation of Reconfigurable Circuits from Machine Code, a work which continued throughout my PhD in Electrical and Computer Engineering, also at FEUP, and in association with INESC-TEC.

Having completed my PhD thesis, Generation of Custom Run-time Reconfigurable Hardware for Transparent Binary Acceleration, I am now a post-doc researcher with INESC-TEC on the topic of special compilers for hardware, and also an Auxiliary Assistant Professor with the Department of Informatics at FEUP.

Interest
Topics
Details

Details

004
Publications

2023

Self-Localization via Circular Bluetooth 5.1 Antenna Array Receiver

Authors
Paulino, N; Pessoa, LM;

Publication
IEEE ACCESS

Abstract

2023

Challenges and Opportunities in C/C++ Source-To-Source Compilation (Invited Paper)

Authors
Bispo, J; Paulino, N; Sousa, LM;

Publication
14th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 12th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2023, January 17, 2023, Toulouse, France.

Abstract
The C/C++ compilation stack (Intermediate Representations (IRs), compilation passes and backends) is encumbered by a steep learning curve, which we believe can be lowered by complementing it with approaches such as source-to-source compilation. Source-to-source compilation is a technology that is widely used and quite mature in certain programming environments, such as JavaScript, but that faces a low adoption rate in others. In the particular case of C and C++ some of the identified factors include the high complexity of the languages, increased difficulty in building and maintaining C/C++ parsers, or limitations on using source code as an intermediate representation. Additionally, new technologies such as Multi-Level Intermediate Representation (MLIR) have appeared as potential competitors to source-to-source compilers at this level. In this paper, we present what we have identified as current challenges of source-to-source compilation of C and C++, as well as what we consider to be opportunities and possible directions forward. We also present several examples, implemented on top of the Clava source-to-source compiler, that use some of these ideas and techniques to raise the abstraction level of compiler research on complex compiled languages such as C or C++. The examples include automatic parallelization of for loops, high-level synthesis optimisation, hardware/software partitioning with run-time decisions, and automatic insertion of inline assembly for fast prototyping of custom instructions. © João Bispo, Nuno Paulino, and Luís Miguel Sousa.

2022

A Flexible HLS Hoeffding Tree Implementation for Runtime Learning on FPGA

Authors
Sousa, LM; Paulino, N; Ferreira, JC; Bispo, J;

Publication
2022 IEEE 21ST MEDITERRANEAN ELECTROTECHNICAL CONFERENCE (IEEE MELECON 2022)

Abstract

2022

Design and Experimental Evaluation of a Bluetooth 5.1 Antenna Array for Angle-of-Arrival Estimation

Authors
Paulino, N; Pessoa, LM; Branquinho, A; Gonçalves, E;

Publication
13th International Symposium on Communication Systems, Networks and Digital Signal Processing, CSNDSP 2022, Porto, Portugal, July 20-22, 2022

Abstract
One the of the applications in the realm of the Internet-of-Things (IoT) is real-time localization of assets in specific application environments where satellite based global positioning is unviable. Numerous approaches for localization relying on wireless sensor mesh systems have been evaluated, but the recent Bluetooth Low Energy (BLE) 5.1 direction finding features based on Angle-of-Arrival (AoA) promise a low-cost solution for this application. In this paper, we present an implementation of a BLE 5.1 based circular antenna array, and perform two experimental evaluations over the quality of the retrieved data sampled from the array. Specifically, we retrieve samples of the phase value of the Constant Tone Extension which enables the direction finding functionalities through calculation of phase differences between antenna pairs. We evaluate the quality of the sampled phase data in an anechoic chamber, and in a real-world environment using a setup composed of four BLE beacons. © 2022 IEEE.

2022

Optimizing Packet Reception Rates for Low Duty-Cycle BLE Relay Nodes

Authors
Paulino, N; Pessoa, LM; Branquinho, A; Almeida, R; Ferreira, I;

Publication
IEEE SENSORS JOURNAL

Abstract

Supervised
thesis

2022

Generating Hardware Modules via Binary Translation of RISC-V Binaries

Author
João Miguel Curado Conceição

Institution
UP-FEUP

2022

Specializing Risc-V Cores for Performance and Power

Author
Henrique Veloso de Sousa

Institution
UP-FEUP

2021

Runtime Management of Heterogeneous Compute Resources in Embedded Systems

Author
Luís Miguel Mendes Pimentel Alves de Sousa

Institution
UP-FEUP

2021

An Exploration of FPGAs as Accelerators for Graph Analysis via High-Level Synthesis

Author
Pedro Filipe Vilhena de Campos Oliveira e Silva

Institution
UP-FEUP

2021

Indoor Bluetooth Low Energy Direction Finding via Circular Antenna Array

Author
Catarina Alexandra Rodrigues Marques

Institution
IPP-ISEP