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Supervised
thesis

Supervised thesis by João Canas Ferreira

Reconfigurable FPGA-Based Baseband Processor for Multi-mode Spectrum Aggregation

Author Mário Lopes Ferreira

Degree PhD

Year 2019

Institution UP-FEUP

Accelerating the training of convolutional neural network

Author Afonso de Sá Reis

Degree MSc

Year 2019

Institution UP-FEUP

Transparent control flow transfer between CPU and Intel FPGAs

Author Daniel Miranda Silva Malafaia Granhão

Degree MSc

Year 2019

Institution UP-FEUP

Gerador de padrões de vídeo UHD utilizando HDL (Verilog)

Author Júnio Duarte Lopes Parente

Degree MSc

Year 2019

Institution UP-FEUP

Accelerating the training of convolutional neural network

Author Afonso de Sá Reis

Degree MSc

Year 2018

Institution UP-FEUP

FPGA Solutions for Users Activity Recognition

Author Tiago Rafael Leite Oliveira

Degree MSc

Year 2018

Institution UP-FEUP

Reconfigurable FPGA-Based Baseband Processor for Multi-mode Spectrum Aggregation

Author Mário Lopes Ferreira

Degree PhD

Year 2018

Institution UP-FEUP

Study and Implementation of Optimized Solutions for Re-Configurable Logic over ASIC Design Flow

Author Ricardo Azevedo Araújo

Degree MSc

Year 2018

Institution UP-FEUP

Configurable coarse-grained array architecture for processing of biological signals

Author João Pedro Sauvarin Lopes

Degree MSc

Year 2017

Institution UP-FEUP

Reconfigurable FPGA-Based NC-OFDM Processor for Multimode Spectrum Aggregation

Author Mário Lopes Ferreira

Degree PhD

Year 2017

Institution UP-FEUP

"Profiling" por hardware em tempo real para sistemas embebidos

Author Rui Miguel Almeida Alves

Degree MSc

Year 2017

Institution UP-FEUP

Evolução da componente algorítmica de cálculo de rotas do Move-Me

Author André Pedro Deus Pinheiro

Degree MSc

Year 2017

Institution UP-FEUP

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