Cookies Policy
The website need some cookies and similar means to function. If you permit us, we will use those means to collect data on your visits for aggregated statistics to improve our service. Find out More
Accept Reject
  • Menu
About

About

Pedro Guedes de Oliveira

He was part of the small team that in 1974 started the Department of Electronics and Telecommunications of the University of Aveiro where he stayed until 1993 and then became a professor at the Faculty of Engineering of the University of Porto (FEUP) where he retired in 2015.

In his career he took several managing responsibilities both at the academic and scientific level, as well as several representative positions, through election, at the Scientific Council of FEUP and the General Council of the University. At present he is Professor Emeritus of the University of Porto.

He was the first president of INESC Porto (today, INESC TEC) until 2005, where he is still a researcher and Advisor to the President, and held several public positions, by invitation, namely as member of the Scientific Council for Science and Engineering of the Science and Technology Foundation, non-Executive Member of the Board of Innovation Agency and Executive Member of the Board of the Foundation for National Scientific Computation.

He also was engaged in cultural initiatives and entities, namely as member of the General Council of CulturPorto and member of the Board of Porto 2001 – European Capital of Culture.

In 2016 he was awarded the Medal of Merit by the Ministry of Science, Technology and Higher Education.

Presently is an Executive Member of the Board of INESC and General Coordinator of INCoDe.2030

Interest
Topics
Details

Details

  • Name

    Pedro Guedes de Oliveira
  • Role

    Consultant to the Chairperson
  • Since

    01st March 1985
  • Nationality

    Portugal
  • Contacts

    +351222094030
    pedro.g.oliveira@inesctec.pt
001
Publications

2012

Proactive engineering

Authors
Duarte, C; Oliveira, HP; Magalhães, F; Tavares, VG; Campilho, AC; de Oliveira, PG;

Publication
Proceedings of the IEEE Global Engineering Education Conference, EDUCON 2012, Marrakech, Morocco, April 17-20, 2012

Abstract
This paper presents two initiatives run by groups of engineering students at the University of Porto: the Microelectronics Students' Group and BioStar. These groups are student-led initiatives that promote different scientific fields through self-guided projects. Both experiences have proven to be very successful in increasing the undergraduate student's interest in science and technology. This work reports the activities, organization and main methodologies employed by these groups, which can be seen as successful approaches to enhance the technical curriculum of students. © 2012 IEEE.

2012

Multipliers with Transparent a-GIZO TFTs using a Neural Model

Authors
Bahubalindruni, G; Duarte, C; Tavares, VG; Barquinha, P; Martins, R; Fortunato, E; de Oliveira, PG;

Publication
2012 20TH TELECOMMUNICATIONS FORUM (TELFOR)

Abstract
This paper presents the results of a preliminary study to examine the ability of post-silicon devices for analog processing. It is focused on the latest thin-film transistors (TFTs) with amorphous gallium-indium-zinc oxide (a-GIZO) as active layer. Three circuit configurations are presented: a differential pair and two multiplier topologies. Both triode and saturation regions of operation are included in the analysis, with the devices set to remain in strong accumulation. A neural model, which is developed based on the measured data of the TFTs, is used for the circuit simulations in the Cadence Virtuoso environment. The analog multipliers simulation results are compared against the expected functional results.

2012

Basic analog circuits with a-GIZO thin-film transistors: Modeling and simulation

Authors
Bahubalindruni, G; Tavares, VG; Barquinha, P; Duarte, C; Martins, R; Fortunato, E; De Oliveira, PG;

Publication
2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2012

Abstract
This paper addresses a modeling and simulation methodology for analog circuit design with amorphous-GIZO thin-film transistors (TFTs). To reach an effective circuit design flow, with commercially available tools, a TFT model has been first developed with an artificial neural network (ANN). Multilayer perceptron with backpropagation algorithm has been adopted to model the static behavior of the TFT devices, for different aspect ratios. The model was then implemented in Verilog-A, to allow a quick instantiation in circuit. Simulations using Cadence Spectre are performed to validate the model. On a second phase, simulation results of basic analog circuits, with this ANN model, are verified against the actual functional results, namely an adder, subtractor, and current mirror circuit. Results demonstrate not only the ANN model accuracy and compatibility with dc and transient analysis, but also show the a-GIZO TFT capability to perform analog operations. © 2012 IEEE.

2011

Network infrastructure for academic IC CAD environments

Authors
Coke, P; Duarte, C; Cardoso, A; Tavares, VG; De Oliveira, PG;

Publication
EUROCON 2011 - International Conference on Computer as a Tool - Joint with Conftele 2011

Abstract
This paper presents an initiative to involve ECE undergraduate students in the design and deployment of a network infrastructure for an academic laboratory. The project aims at attaining a reliable and secure network for an IC CAD environment. The students focused on employing secure authentication, accounting and storage with single sign-on, based on enterprise-grade, open-source protocols. This initiative proved to be highly motivating and allowed the students to develop knowledge and hands-on experience on the area of network security. The resulting network design and core infrastructure is herein described as well as its deployment in a real microelectronics design environment. © 2011 IEEE.

2007

Freeman olfactory cortex model: A multiplexed KII network implementation

Authors
Tavares, VG; Tabarce, S; Principe, JC; de Oliveira, PG;

Publication
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING

Abstract
This paper presents the results of a CMOS-VLSI implementation of a realistic computational model proposed by Walter Freeman for the olfactory system. This model, in later years, has been studied for engineering applications such as auto-association and classification. The analogue nature of the model motivates analogue VLSI implementations. However, the dimension and complexity of such system poses many obstacles to an analogue electronic implementation; one such is the massive interconnectivity which size increases with the square of the number of inputs (channels). We suggest a multiplexing procedure that puts the burden of interconnectivity over a digital system that is simpler to design and makes the analogue system more treatable. The procedure naturally samples the signals. To avoid smoothing filters, a discrete-time solution was also employed. Although with such approach the time resolution is reduced, the advantages overcome the detriments. Previous work has shown that the model can be efficiently discretized using DSP techniques, resulting on a system that is able to predict, on sample-by-sample basis, the behaviour of the VLSI circuit, allowing for a simple and flexible way to adjust the circuit parameters. We present the measured circuit results that are further confronted with the digital implementation.