Abstract
It is typical for cycles of iteration to be used to refine the current state of the design of a system so that it more closely meets its requirements. Such refinements are in terms of the original requirements specification and any new requirements that have been identified during this process. However, not all defined requirements are equally essential, particularly in high consequence systems where there are issues of dependability. Although descriptive methods for scenario analysis can be used to highlight new requirements, it can be difficult to evaluate the impact of these new requirements. In this paper, we exemplify this problem and investigate how numeric methods can be used to highlight the impact of consequences identified by descriptive scenario analysis. An example from the context of human reliability analysis is presented and dependability issues for system design are considered.

Abstract
We present a novel method to study the behaviour of the optical propel-ties of photopolymer materials with temperature. The photopolymer is deposited on the tip of optical fibres by dip coating to fabricate low-finesse Fabry-Perot microcavities. The signal processing technique utilized to interrogate the cavity is based on the generation of two quadrature phase-shifted interferometric signals using two Bragg fibre gratings. This technique enables the determination of the values of the thermo-optical coefficient and the linear coefficient of thermal expansion of the photopolymer. The effectiveness of the processing technique is also exploited in the study of the dependence of the temperature sensitivity on the cavity thickness.

Abstract
An optical fiber interferometer for measuring the d(33) coefficient of piezoelectric samples is described. Its configuration is based on the Mach-Zehnder interferometer, and a double incidence on the thin-film samples successfully suppresses the undesirable bending effect of the substrate. Detection of the small displacement is based on an active homodyne scheme. Results are reported for a bulk piezoelectric transducer (PZT) sample and a PZT thin-film incorporated in a microactuator. (C) 2002 American Institute of Physics.

Abstract
This paper describes the general methodology that should be adopted to develop impact evaluation studies in distribution networks in case of connection of large amounts of dispersed generation (DG). It contains a description regarding the characterization of scenarios to be analyzed, problems to be addressed and tools to be used. Results from the analysis of a real network, where a large amount of dispersed generation (cogeneration) exists, are described. Technical issues to be tackled in the future and conclusions obtained from the studied examples are included.

Abstract
Field-Programmable-Core-Arrays (FPCA) will include various computing cores for a wide variety of applications ranging from DSP to general purpose computing. With the increasing gap between core computing speeds and memory access latency, managing and orchestrating the movement of data across multiple cores will become increasingly important. In this paper we propose data reorganization engines that allow a wide variety of data reorganizations intra- as well as inter-memory modules for future FPCAs. We have experimented with a suite of data reorganizations pervasive in DSP applications. Our limited set of experiments reveals that the proposed designs for these engines are flexile and use little design area in current FPGA fabrics, making them amenable to be easily integrated in future FPCAs as either soft- or hard- macros.

Abstract
This paper describes an automated approach to hardware design space exploration, through a collaboration between parallelizing compiler technology and high-level synthesis tools. We present a compiler algorithm that automatically explores the large design spaces resulting from the application of several program transformations commonly used in application-specific hardware designs. Our approach uses synthesis estimation techniques to quantitatively evaluate alternate designs for a loop nest computation. We have implemented this design space exploration algorithm in the context of a compilation and synthesis system called DEFACTO, and present results of this implementation on five multimedia kernels. Our algorithm derives an implementation that closely matches the performance of the fastest design in the design space, and among implementations with comparable performance, selects the smallest design. We search on average only 0.3% of the design space. This technology thus significantly raises the level of abstraction for hardware design and explores a design space much larger than is feasible for a human designer.