Abstract

Abstract
The paper explores the role that formal modeling may play in aiding the visualization and implementation of usability requirements of a control panel. We propose that this form of analysis should become a systematic and routine aspect of the development Of Such interfaces. We use a notation for describing the interface that is convenient to use by software engineers, and describe a set of tools designed to make the process systematic and exhaustive.

Abstract
Coarse-grained reconfigurable architectures have proven their value as programmable accelerators for general purpose processors. For early evaluation of those architectures, we need an approach able to exploit and retarget different Processing Elements (PEs) while maintaining the same compilation flow. Bearing in mind those aspects, this paper describes an approach able to map, evaluate and generate reconfigurable architectures based on an array of PEs. We use Rewriting Logic to map computations described by imperative programming languages to the PEs of the target architecture, a VHDL generation step to prototype the architectures being evaluated, and a clock cycle-based simulator to achieve first assessments about the performance of those architectures. In order to show the potential of our approach, we present results of 1-D coarse-grained reconfigurable arrays as accelerator softcores implemented in an FPGA, and the effects of different PE's structures and complexities.

Abstract
Purpose - The purpose of this article is to provide several viewpoints about monitoring aspects related to recent deployments of a new technology (IPv6). Design/methodology/approach - Several views and domains were used, with a common point: the Portuguese research and education network (RCTS). Findings - A significant amount of work is yet to be done, in order to mature the deployment of this new internet technology. Research limitations/implications - The equipment whence the data were collected still has some limitations regarding the new technology. Future datasets may benefit from wider deployments. Practical implications - The work also demonstrates that IPv6 deployment is in its early stages, which is negative, given the projected dates for IPv4 exhaustion. Originality/value - The findings and the work described will be useful for people trying to deploy IPv6 networks in the short or medium timeframe. © Emerald Group Publishing Limited.

Abstract

Abstract
Nowadays applications produce infinite streams of data distributed across wide sensor networks. In this work we study the problem of continuously maintain a cluster structure over the data points generated by the entire network. Usual techniques operate by forwarding and concentrating the entire data in a central server, processing it as a multivariate stream. In this paper, we propose DGClust, a new distributed algorithm which reduces both the dimensionality and the communication burdens, by allowing each local sensor to keep an online discretization of its data stream, which operates with constant update time and (almost) fixed space. Each new data point triggers a cell in this univariate grid, reflecting the current state of the data stream at the local site. Whenever a local site changes its state, it notifies the central server about the new state it is in. This way, at each point in time, the central site has the global multivariate state of the entire network. To avoid monitoring all possible states, which is exponential in the number of sensors, the central site keeps a small list of counters of the most frequent global states. Finally, a simple adaptive partitional clustering algorithm is applied to the frequent states central points in order to provide an anytime definition of the clusters centers. The approach is evaluated in the context of distributed sensor networks, presenting both empirical and theoretical evidence of its advantages.