Abstract
This paper presents an interactive programming method for programming industrial robots in ceramic applications. The main purpose was to develop a simple but flexible programming system that empowers the user with product driven programming without compromising flexibility. To achieve this flexibility, a two step hybrid programming model was designed: first the user sketches the desired trajectory in a spatial augmented reality programming table using the final product and then relies on an advanced 3D graphical system to tune the robot trajectory in the final workcell. The results measured by the end-user feedback show that a new level of flexibility was reached for this type of application.

Abstract
Benchmarking is comparing the output of different systems for a given set of input data in order to improve the system's performance. Faced with the lack of realistic and operational benchmarks that can be used for testing optimization methods and control systems in flexible systems, this paper proposes a benchmark system based on a real production cell. A three-step method is presented: data preparation, experimentation, and reporting. This benchmark allows the evaluation of static optimization performances using traditional operation research tools and the evaluation of control system's robustness faced with unexpected events.

Abstract
This paper characterizes transparent current mirrors with n-type amorphous gallium-indium-zinc-oxide (a-GIZO) thin-film transistors (TFTs). Two-TFT current mirrors with different mirroring ratios and a cascode topology are considered. A neural model is developed based on the measured data of the TFTs and is implemented in Verilog-A; then it is used to simulate the circuits with Cadence Virtuoso Spectre simulator. The simulation outcomes are validated with the fabricated circuit response. These results show that the neural network can model TFT accurately, as well as the current mirroring ability of the TFTs.

Abstract

Abstract
The IEC 61508 standard recognizes the programming languages defined in IEC 61131-3 as being appropriate for safety-related applications, and suggests the use of static analysis techniques to find errors in the source code. In this context, we have added a semantic verification stage to the MatIEC compiler—an open source ST, IL, and SFC code translator to ANSI C. In so doing, we have identified several issues related to the definition of the semantics of the IL and ST programming languages, as well as with the data type model defined in IEC 61131-3. Most of the issues are related to undefined semantics, which may result in applications generating distinct results, depending on the platform on which they are executed. In this paper we describe some of the issues we uncovered, explain the options we took, and suggest how the IEC 61131-3 standard could be made more explicit. © Springer International Publishing Switzerland 2013.

Abstract
The ability to map instructions running in a microprocessor to a reconfigurable processing unit (RPU), acting as a coprocessor, enables the runtime acceleration of applications and ensures code and possibly performance portability. In this work, we focus on the mapping of loop-based instruction traces (called Megablocks) to RPUs. The proposed approach considers offline partitioning and mapping stages without ignoring their future runtime applicability. We present a toolchain that automatically extracts specific trace-based loops, called Megablocks, from MicroBlaze instruction traces and generates an RPU for executing those loops. Our hardware infrastructure is able to move loop execution from the microprocessor to the RPU transparently, at runtime, and without changing the executable binaries. The toolchain and the system are fully operational. Three FPGA implementations of the system, differing in the hardware interfaces used, were tested and evaluated with a set of 15 application kernels. Speedups ranging from 1.26 × to 3.69 × were achieved for the best alternative using a MicroBlaze processor with local memory. © 2013 João Bispo et al.