Abstract
In order to achieve underwater acoustic high data-rate and real time communications, it is essential to implement a system that operates both at high and wideband frequencies using digital modulations. Therefore, to reduce the time and cost of developing acoustic communications an emulator of a physical layer model was implemented, allowing to test in real time the performance of digital modulations. The model was composed of an emitter transducer, a hydrophone and the subaquatic medium and was integrated in a Field Programmable Gate Array (FPGA) in order to emulate the physical layer in the acoustic modem testing. The emitter transducer and the hydrophone models were designed to meet real prototype characteristics. The system prototype was implemented in order to compare the experimental trials results with those obtained in emulator, emulating the transmission of acoustic signals, using different types of digital modulations. The system was tested using Binary Phase-Shift Keying (BPSK), Binary Frequency Shift keying (BFSK) and Binary Amplitude Shift Keying (BASK) modulations with a 1 MHz carrier frequency resulting in a data rate of 125 kbps. It was verified that the implemented model represents a suitable approximation to the real subaquatic communication channel, allowing the evaluation of digital acoustic communications.

Abstract

Abstract
Solving complex optimization problems with genetic algorithms (GAs) with custom computing architectures is a way to improve the execution time of this metaheuristic, which is known to consume considerable amounts of time to converge to final solutions. In this work, we present a scalable computing array architecture to accelerate the execution of cellular GAs (cGAs), a variant of genetic algorithms which can conveniently exploit the coarse- grain parallelism afforded by custom parallel processing. The proposed architecture targets Xilinx FPGAs and is used as an auxiliary processor of an embedded CPU (MicroBlaze). To handle different optimization problems, a high- level synthesis (HLS) design flow is proposed where the problem- dependent operations are specified in C++ and synthesised to custom hardware, thus requiring a minimum knowledge of digital design for FPGAs. The minimum energy broadcast (MEB) problem in wireless ad hoc networks is used as a case study. An existing software implementation of a GA to solve this problem is ported to the proposed computing array to demonstrate its effectiveness and the HLS- based design flow. Implementation results in a Virtex- 6 FPGA show significant speedups, while finding solutions with improved quality.

Abstract
Today there are different teams specializing in different areas such as shipwrecked rescue, searching for mines, environmental monitoring, border surveillance, traffic control, search and rescue and harbor protecting. Robotic systems and unmanned vehicles can provide additional capabilities and new innovative solutions that contribute to these applications. This paper presents the Robotic Exercises 2014 (REX'14) and the lessons learned with various field experiments performed with multiple unnamed systems in the context of the Portuguese Navy concept of operations. During the REX'2014 multiple experiments and systems were operated. Autonomy and environment characterization and assessment missions were performed with autonomous surface vehicles such as the ROAZ autonomous surface vehicle or with autonomous underwater vehicle MARES. Autonomy and system validation was performed for fast water jet propelled surface systems such as the SWIFT autonomous surface vehicle and the ICARUS unmanned rescue capsule, wind propulsion tests were also performed with unnamed surface vehicles and new maritime wireless communication protocols were tested.

Abstract

Abstract