Abstract
Object-oriented frameworks are a powerfitl reuse technique but they are also very complex and difficult to design. Framework's design aims at separating the invariant aspects across several applications in a domain - frozen spots - from the aspects that vary among applications and thus must be kept flexible and customizable - hot spots. The flexibility and extensibility provided at hot spots is usually achieved by following common design patterns, which are often hard and tiresome to identify without proper documentation. This paper proposes a reverse engineering approach to identify the design patterns used in a framework, using a high-level hot spot representation. The goals of this work include: researching a design approach that produces usable intermediate reuse information; defining a representation for design patterns based on meta-patterns; and developing a supporting tool to automate the reverse engineering process.

Abstract
The perception that we have of our world depends on the task we are currently performing in the environment, so if we are driving a car we will pay attention to the objects that are visually important to the task we are performing such as, the road, road signs, other vehicles, etc. The same is true when we explore virtual environments. The creation of high-fidelity 3D maps on mobile devices to aid navigation in urban environments is computationally very expensive, precluding achieving this quality at interactive rates. In this paper we present a case study to show how the human visual system may be exploited, when viewers are undertaking a task, to reduce the overall quality of the displayed image, without the users being aware of this reduction in quality. The displayed images are selectively rendered with the key features used to identify location and orientation in a 3D urban environment produced in high quality and the remainder of the image in low quality.

Abstract
In this article we focus on interoperable geographic information (GI) services from the crisis management perspective. Based on Open Geospatial Consortium [10] standards and initiatives, we present the building blocks of the interoperable solution for supporting crisis management that is proposed as a result of the EU sponsored project, MEDSI [1]. In particular, we focus on the application and operationalization of several OGC standards, some adopted and some still under discussion, such as WMS, WFS, WMC, SLD and SMS, as well as their integration and cooperation within a single software framework.

Abstract
It is generally considered that a key component of electronic government in the future will be electronic voting, as a means of facilitating the participation of citizens in elections and public debates. However, a long path has to be pursued before electronic voting, particularly if based on Internet, is accepted as a reliable system alternative to conventional methods. In this paper, we propose a new and simple platform, based on open software, which can be used primarily in small to medium sized communities, as a means to build confidence and experience for future larger elections. We try to provide adequate answers to multiple requirements, such as accuracy, democracy, privacy, verifiability and mobility. This can be done by establishing a distributed system which supports the different roles of a voting system and by using cryptography techniques in the interactions between these components.

Abstract
This paper presents recent advances in a compiler infrastructure to map algorithms described in a Java subset to FPGA-based platforms. We explain how delays and resources are estimated to guide the compiler through scheduling and temporal partitioning. The compiler supports complex analytical models to estimate resources and delays for each functional unit. The paper presents experimental results for a number of benchmarks. Those results also arrise a question when performing temporal partitioning: shall we try to group as many computational structures in the same configuration or shall we have several configurations?

Abstract
This paper presents an infrastructure to test the functionality of the specific architectures output by a high-level compiler targeting dynamically reconfigurable hardware. It results in a suitable scheme to verify the architectures generated by the compiler, each time new optimization techniques are included or changes in the compiler are performed. We believe this kind of infrastructure is important to verify, by functional simulation, further research techniques, as far as compilation to Field-Programmable Gate Array (FPGA) platforms is concerned.