Cookies Policy
The website need some cookies and similar means to function. If you permit us, we will use those means to collect data on your visits for aggregated statistics to improve our service. Find out More
Accept Reject
  • Menu
Publications

Publications by Vítor Santos Costa

2005

Improving memory usage in the BEAM

Authors
Lopes, R; Costa, VS;

Publication
PRACTICAL ASPECTS OF DECLARATIVE LANGUAGES, PROCEEDINGS

Abstract
A critical issue in the design of logic programming systems is their memory performance, both in terms of total memory usage and locality in memory accesses. BEAM, as most modern Prolog systems, requires both good emulator design and good memory performance for best performance. We report on a detailed study of the memory management techniques used on our sequential implementation of the EAM. We address questions like how effective are the techniques the BEAM uses to recover and reuse memory space, how garbage collection affects performance and how to classify and unify variables in a EAM environment. We also propose a finer variable allocation scheme to reduce memory overheads that is quite effective at reducing memory pressure, with only a small overhead.

2003

Performance Issues in Prolog Applications

Authors
Costa, VS;

Publication
LECTURE NOTES IN COMPUTER SCIENCE

Abstract

1992

And-Or Parallelism in Full Prolog with Paged Binding Arrays

Authors
Gupta, G; Costa, VS;

Publication
PARLE '92: Parallel Architectures and Languages Europe, 4th International PARLE Conference, Paris, France, June 15-18, 1992, Proceedings

Abstract

1999

The influence of architectural parameters on the performance of parallel logic programming systems

Authors
Silva, MG; Dutra, IC; Bianchini, R; Costa, VS;

Publication
PRACTICAL ASPECTS OF DECLARATIVE LANGUAGES

Abstract
In this work we investigate how different machine settings for a hardware Distributed Shared Memory (DSM) architecture affect the performance of parallel logic programming (PLP) systems. We use execution-driven simulation of a DASH-like multiprocessor to study the impact of the cache block size, the cache size, the network bandwidth, the write buffer size, and the coherence protocol on the performance of Andorra-I, a PLP system capable of exploiting implicit parallelism in Prolog programs. Among several other observations, we find that PLP systems favour small cache blocks regardless of the coherence protocol, while they favour large cache sizes only in the case of invalidate-based coherence. We conclude that the cache block size, the cache size, the network bandwidth, and the coherence protocol have a significant impact on the performance, while the size of the write buffer is somewhat irrelevant.

2002

Performance evaluation of fast Ethernet, Giganet and Myrinet on a cluster

Authors
Lobosco, M; Costa, VS; de Amorim, CL;

Publication
COMPUTATIONAL SCIENCE-ICCS 2002, PT I, PROCEEDINGS

Abstract
This paper evaluates the performance of three popular technologies used to interconnect machines on clusters: Fast Ethernet, Myrinet and Giganet. To achieve this purpose, we used the NAS Parallel Benchmarks. Surprisingly, for the LU application, the performance of Fast Ethernet was better than Myrinet. We also evaluate the performance gains provided by VIA, a user lever communication protocol, when compared with TCP/IP, a traditional, stacked-based communication protocol. The impacts caused by the use of Remote DMA Write are also evaluated. The results show that Fast Ethernet, when combined with a high performance communication protocol, such as VIA, has a good cost-benefit ratio, and can be a good choice to connect machines on a small cluster environment where bandwidth is not crucial for applications.

2000

A Note on Two Simple Transformations for Improving the Efficiency of an ILP System

Authors
Costa, VS; Srinivasan, A; Camacho, R;

Publication
Inductive Logic Programming, 10th International Conference, ILP 2000, London, UK, July 24-27, 2000, Proceedings

Abstract

  • 17
  • 35