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Publications

Publications by CRACS

2014

A portable prolog predicate for printing rational terms

Authors
Mantadelis, T; Rocha, R;

Publication
Proceedings of the International Joint Workshop on Implementation of Constraint and Logic Programming Systems and Logic-Based Methods in Programming Environments 2014, CICLOPS-WLPE 2014

Abstract
Rational terms or rational trees are terms with one or more infinite sub-terms but with a finite representation. Rational terms appeared as a side effect of omitting the occurs check in the unification of terms, but their support across Prolog systems varies and often fails to provide the expected functionality. A common problem is the lack of support for printing query bindings with rational terms. In this paper, we present a survey discussing the support of rational terms among different Prolog systems and we propose the integration of a Prolog predicate, that works in several existing Prolog systems, in order to overcome the technical problem of printing rational terms. Our rational term printing predicate could be easily adapted to work for the top query printouts, for user printing and for debugging purposes.

2014

A Simple and Efficient Lock-Free Hash Trie Design for Concurrent Tabling

Authors
Areias, M; Rocha, R;

Publication
CoRR

Abstract

2014

Declarative Programming and Knowledge Management - Declarative Programming Days, KDPD 2013, Unifying INAP, WFLP, and WLP, Kiel, Germany, September 11-13, 2013, Revised Selected Papers

Authors
Hanus, M; Rocha, R;

Publication
KDPD

Abstract

2014

A parallel virtual machine for executing forward-chaining linear logic programs

Authors
Cruz, F; Rocha, R; Goldstein, SC;

Publication
Proceedings of the International Joint Workshop on Implementation of Constraint and Logic Programming Systems and Logic-Based Methods in Programming Environments 2014, CICLOPS-WLPE 2014

Abstract
Linear Meld is a concurrent forward-chaining linear logic programming language where logical facts can be asserted and retracted in a structured way. The database of facts is partitioned by the nodes of a graph structure which leads to parallelism if nodes are executed simultaneously. Communication arises whenever nodes send facts to other nodes by fact derivation. We present an overview of the virtual machine that we implemented to run Linear Meld on multicores, including code organization, thread management, rule execution and database organization for efficient fact insertion, lookup and deletion. Although our virtual machine is a work-in-progress, our results already show that Linear Meld is not only capable of scaling graph and machine learning programs but it also exhibits some interesting performance results when compared against other programming languages.

2014

Design and Implementation of a Multithreaded Virtual Machine for Executing Linear Logic Programs

Authors
Cruz, F; Rocha, R; Goldstein, SC;

Publication
Proceedings of the 16th International Symposium on Principles and Practice of Declarative Programming, Kent, Canterbury, United Kingdom, September 8-10, 2014

Abstract
Linear Meld is a concurrent forward-chaining linear logic programming language where logical facts can be asserted and retracted in a structured way. In Linear Meld, a program is seen as a database of logical facts and a set of derivation rules. The database of facts is partitioned by the nodes of a graph structure which leads to parallelism when nodes are executed simultaneously. Due to the foundations on linear logic, rules can retract facts in a declarative and structured fashion, leading to more expressive programs. We present the design and implementation of the virtual machine that we implemented to run Linear Meld on multicores, with particular focus on thread management, code organization, fact indexing, rule execution, and database organization for efficient fact insertion, lookup and deletion. Our results show that the virtual machine is capable of scaling programs with up to 16 threads and also exhibits interesting scalar performance results due to our indexing optimizations.

2014

A Datalog Engine for GPUs

Authors
Alberto Martinez Angeles, CA; Dutra, I; Costa, VS; Buenabad Chavez, J;

Publication
DECLARATIVE PROGRAMMING AND KNOWLEDGE MANAGEMENT

Abstract
We present the design and evaluation of a Datalog engine for execution in Graphics Processing Units (GPUs). The engine evaluates recursive and non-recursive Datalog queries using a bottom-up approach based on typical relational operators. It includes a memory management scheme that automatically swaps data between memory in the host platform (a multicore) and memory in the GPU in order to reduce the number of memory transfers. To evaluate the performance of the engine, four Datalog queries were run on the engine and on a single CPU in the multicore host. One query runs up to 200 times faster on the (GPU) engine than on the CPU.

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