Abstract
An automated synthesis procedure, based on genetic algorithms, to design optimum performance Si-integrated radio-frequency and microwave binary-weighted single-ended switched capacitor arrays (RFSSCAs), is presented in this paper. The method determines the RFSSCA circuit size and the circuit components values from the top-level system specifications. The genetic synthesis tool optimizes a fitness function based on user-specified performance constraints. Besides that, the algorithm uses a sharing scheme in order to achieve a set of optimal solutions. The solutions set, obtained by the genetic algorithm, give to the designer the liberty of choosing several possible implementations maintaining the performance objective. To confirm the circuit solutions obtained by the algorithm, two RFSSCAs are synthesized in a 2-poly 4-metal 0.35 mu m standard CMOS technology. The circuit is then simulated in SpectreRF. Since the synthesized results are in very good agreement with the simulated outcomes, it can be stated that the proposed genetic synthesis method is a very useful tool to design optimum performance KFSSCAs.

Abstract
A 13.5-15.5 GHz low phase noise digitally controlled LC VCO, designed in a 015 mu m BiCMOS technology, is presented in this paper. The resonant circuit of the VCO uses a high performance radio-frequency differential binary-weighted switched capacitor array (RFDSCA) to cover the 2 GHz tuning band with a continuous tuning voltage of 5 V. The RFDSCA circuit was optimized using a new automated synthesis method in order to guarantee a VCO with minimum phase noise. The VCO presents a typical phase noise of -116 dB/Hz @ 1MHz and a maximum tuning sensitivity of 165 MHz/V. The VCO core works with a voltage supply of 3 V and has a current consumption of 5 mA. The results demonstrate the feasibility of implementing and using high performance RFDSCAs as digital tuning elements at operating frequencies up to tens of gigahertz.

Abstract
The IEC 61131-3 standard defines a common framework for programming PLCs (Programmable Logic Controllers), which includes the complete definition of four programming languages and a state machine definition language. Industrial PLC vendors are slowly offering support for this standard, however small inconsistencies remain between their implementations, transferring programs between vendors is almost impossible due to different rile formats, and licenses are generally too expensive to allow students do install these commercial solutions on their own computers. To this end, the authors have developed an Integrated Development Environment (IDE) for the IEC 61131-3 framework, which is being offered to the general public under the GNU Public License (GPL). The IDE consists of a Graphical User Interface (GUI) and a backend compiler. Using the GUI the user may develop programs in any of the four programming languages, as well as the state machine definition language. The backend compiler is used to convert these programs into equivalent C++ programs which may later be compiled and executed on various platforms.

Abstract
The IEC-61499 standard defines a framework in which distributed control applications may be developed, and how these are interpreted and executed. With the distributed nature of the control applications, many new issues also need to be taken into account. Most of these arise due to the new error model and failure modes of the distributed hardware on which the distributed application is being executed. On the other hand, the distributed nature of the hardware also allows new capabilities to be explored, such as improved reliability through masking of faults. Fault tolerance is usually achieved by the use of replication. Replication at the software level allows for much smaller granularity, but all replicas must be kept synchronised in order to produce the same output data and events. To achieve replica determinism all replicas must process the same set of inputs in the same order, and the outputs of the replicas must somehow be consolidated. The IEC 61499 framework however does not explicitly handle the replication of software components. In this paper we propose a replication model for IEC-61499 applications, and discuss which mechanisms and protocols may be used for their support. In short, replica determinism is achieved through the use of distributed synchronised clocks, atomic multicast protocols, as well as timed messages. ©2007 IEEE.

Abstract
Recently, two CAT-1 projects have been initiated related to Granada Basin area (Betic Cordillera, Southern Spain), aimed at the detection of deformation in the region applying time series InSAR methodology. Due to the outstanding availability of ERS-1/2 and Envisat acquisitions, a time span of more than 12 years is covered and time series can be produced, enabling us to assess the feasibility of monitoring deformation with millimetre precision. The ultimate goal of these projects is the quantification of displacements and determination of their mean directions, relating them to dynamic changes and stress accumulation in order to identify potential seismic hazard locations. For the moment, not all available scenes have been received, so a preliminary data processing has been carried out at the Padul fault area. In this paper, we present a status report of both projects.

Abstract