2000
Authors
Lopes, L; Silva, F; Vasconcelos, VT;
Publication
2000 INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES, PROCEEDINGS
Abstract
This paper presents a multithreaded abstract machine for the TyCO process calculus. We argue that process calculi provide a powerful framework to reason about fine grained parallel computations. They allow the construction of formally verifiable systems on which to base high-level programming idioms, combined with efficient compilation schemes into multithreaded architectures.
2000
Authors
Costa, VS; Rocha, R; Silva, F;
Publication
EURO-PAR 2000 PARALLEL PROCESSING, PROCEEDINGS
Abstract
One of the advantages of logic programming is the fact that it offers many sources of implicit parallelism, such as and-parallelism and or-parallelism. Arguably, or-parallel systems, such as Aurora and Muse, have been the most successful parallel logic programming systems so far. Or-parallel systems rely on techniques such as Environment Copying to address the problem that branches being explored in parallel may need to assign different bindings for the same shared variable. Recent research has led to two new binding representation approaches that also support independent and-parallelism: the Sparse Binding Array and the Copy-On-Write binding models. In this paper, we investigate whether these newer models are practical alternatives to copying for or-parallelism. We based our work on YapOr, an or-parallel copying system using the YAP Prolog engine, so that the three alternative systems share schedulers and the underlying engine.
2000
Authors
Silva, F; Watson, P;
Publication
JOURNAL OF LOGIC PROGRAMMING
Abstract
This paper discusses the design of Dorpp, an or-parallel Prolog system for distributed memory architectures, The problem of sharing the environment across a set of nodes that do not physically share memory is addressed in a novel manner by designing a Virtual Shared Memory (VSM) scheme to specifically meet the requirements of or-parallelism The aim is to avoid the overheads of a general VSM scheme that would provide a stricter level of memory coherence than is actually required, The paper identifies the requirements for memory coherence in or-parallel Prolog, and describes how they can be met cheaply, Simulation results are presented and analyzed in order to highlight key aspects of the system's run-time behavior.
2000
Authors
Pontelli, E; Costa, VS;
Publication
SIGPLAN Notices
Abstract
2000
Authors
Costa, VS; Srinivasan, A; Camacho, R;
Publication
Inductive Logic Programming, 10th International Conference, ILP 2000, London, UK, July 24-27, 2000, Proceedings
Abstract
2000
Authors
De Castro Dutra, I; Costa, VS; Bianchini, R;
Publication
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Abstract
In this paper we use execution-driven simulation of a scalable multiprocessor to evaluate the performance of the Andorra-I parallel logic programming system under invalidate and update-based protocols. We use two versions of Andorra-I. One of them was originally designed for bus-based multiprocessors, while the other is optimised for scalable architectures. We study a well-known invalidate protocol and two different update-based protocols. Our results show that for our sample logic programs the update-based protocols outperform their invalidate-based counterpart for the original version of Andorra-I. In contrast, the optimised version of Andorra-I benefits the most from the invalidate-based protocol, but a hybrid update-based protocol performs as well as the invalidate protocol in most cases. We conclude that parallel logic programming systems can consistently benefit from hybrid update-based protocols. © Springer-Verlag Berlin Heidelberg 2000.
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