2025
Autores
Rodrigues, NB; Coelho, A; Rossetti, RJF;
Publicação
Proceedings of the 20th International Joint Conference on Computer Vision, Imaging and Computer Graphics Theory and Applications, VISIGRAPP 2025 - Volume 1: GRAPP, HUCAPP and IVAPP, Porto, Portugal, February 26-28, 2025.
Abstract
Driving simulators are essential tools for training, education, research, and scientific experimentation. However, the diversity and quality of virtual environments in simulations is limited by the specialized human resources availability for authoring the content, leading to repetitive scenarios and low complexity of real-world scenes. This work introduces a pipeline that can process text-based narratives outlining driving experiments to procedurally generate dynamic traffic simulation scenarios. The solution uses Retrieval-Augmented Generation alongside local open-source Large Language Models to analyse unstructured textual information and produce a knowledge graph that encapsulates the world scene described in the experiment. Additionally, a context-based formal grammar is generated through inverse procedural modelling, reflecting the game mechanics related to the interactions among the world entities in the virtual environment supported by CARLA driving simulator. The proposed pipeline aims to simplify the generation of virtual environments for traffic simulation based on descriptions from scientific experiment, even for users without expertise in computer graphics. © 2025 by SCITEPRESS–Science and Technology Publications, Lda.
2025
Autores
Santos, T; Bispo, J; Cardoso, JMP; Hoe, JC;
Publicação
33rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2025, Fayetteville, AR, USA, May 4-7, 2025
Abstract
Heterogeneous CPU-FPGA C/C++ applications may rely on High-level Synthesis (HLS) tools to generate hardware for critical code regions. As typical HLS tools have several restrictions in terms of supported language features, to increase the size and variety of offloaded regions, we propose several code transformations to improve synthesizability. Such code transformations include: struct and array flattening; moving dynamic memory allocations out of a region; transforming dynamic memory allocations into static; and asynchronously executing host functions, e.g., printf(). We evaluate the impact of these transformations on code region size using three real-world applications whose critical regions are limited by non-synthesizable C/C++ language features. © 2025 IEEE.
2025
Autores
Kurteshi, R; Almeida, F;
Publicação
Knowledge Sharing and Fostering Collaborative Business Culture
Abstract
Knowledge sharing and team dynamics are essential elements of entrepreneurial success, especially in teams that operate in innovative environments. This chapter explores how participation in an incubation program influences the formation and development of entrepreneurial team identity. It aims to understand the dynamics involved in creating entrepreneurial teams, the practices of knowledge sharing, and the role digital technologies play in supporting and sustaining these processes. The study focuses on teams that completed the CEU iLab Incubation Program, with data gathered through in-depth semistructured interviews from twenty-five entrepreneurs across various startups. Five cases, involving entire entrepreneurial teams, were central to this research. The findings offer valuable insights for enhancing incubation programs, promoting entrepreneurial identity formation, and improving the success of new ventures. These insights are beneficial for both scholars and practitioners in the entrepreneurship field. © 2025 by IGI Global Scientific Publishing. All rights reserved.
2025
Autores
Santos, T; Bispo, J; Cardoso, JMP;
Publicação
33rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2025, Fayetteville, AR, USA, May 4-7, 2025
Abstract
Critical performance regions of software applications are often accelerated by offloading them onto an FPGA. An efficient end result requires the judicious application of two processes: hardware/software (hw/sw) partitioning, which identifies the regions for offloading, and the optimization of those regions for efficient High-level Synthesis (HLS). Both processes are commonly applied separately, not relying on any potential interplay between them, and not revealing how the decisions made in one process could positively influence the other. This paper describes our primary efforts and contributions made so far, and our work-in-progress, in an approach that combines both hw/sw partitioning and optimization into a unified, holistic process, automated using source-to-source compilation. By using an Extended Task Graph (ETG) representation of a C/C++ application, and expanding the synthesizable code regions, our approach aims at creating clusters of tasks for offloading by a) maximizing the potential optimizations applied to the cluster, b) minimizing the global communication cost, and c) grouping tasks that share data in the same cluster. © 2025 IEEE.
2025
Autores
Schneider, D; De Almeida, MA; Chaves, R; Fonseca, B; Mohseni, H; Correia, A;
Publicação
2025 7th International Congress on Human-Computer Interaction, Optimization and Robotic Applications (ICHORA)
Abstract
2025
Autores
da Silva, EM; Schneider, D; Miceli, C; Correia, A;
Publicação
2025 28th International Conference on Computer Supported Cooperative Work in Design (CSCWD)
Abstract
The access to the final selection minute is only available to applicants.
Please check the confirmation e-mail of your application to obtain the access code.