2008
Autores
Mota, PF; da Silva, JM; Long, J;
Publicação
2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2008), VOLS 1-4
Abstract
An adaptive amplifier scheme is presented which allows for estimating and correcting the behaviour of a non-linear amplifier, in order to improve its performance for RF communication. This is attained configuring its operating mode in one of estimation of the amplifier's non-linearity, automatic gain control, and correction of eye diagrams' opening. The theory behind these three operating modes is explained first using simulation results obtained with a behavioural model. Experimental results, obtained with a proof-of-concept prototype, which validate the functional correctness in these three modes are also presented. Issues concerning implementation requirements and limitations are discussed.
2000
Autores
Morandi, C; Chiorboli, G; Dallet, D; Haddadi, D; Mazzoleni, S; da Silva, JM; Pernull, H; Roy, PY;
Publicação
COMPUTER STANDARDS & INTERFACES
Abstract
DYNAD, a Standards, Measurements and Testing project supported by the European Commission within the Framework IV activities, is a research project aiming at the investigation of test procedures for evaluating the dynamic performances of A/D converters and S/H circuits. The paper concisely reports about the activities carried out in the first months of the project, activities which aim at improving the existing norms for what concerns the "classical" dynamic test methods for A/D converters, based on the use of sinusoidal stimuli. Web links are provided so that any interested party may contribute his/her opinion on the developed draft. Then, the research activities planned for the following years are briefly illustrated.
2008
Autores
Rocha, LA; Mol, L; Cretu, E; Wolffenbuttel, RF; MacHado Da Silva, J;
Publicação
VLSI Design
Abstract
A test technique for capacitive MEMS accelerometers and electrostatic microactuators, based on the measurement of pull-in voltages and resonance frequency, is described. Using this combination of measurements, one can estimate process-induced variations in the device layout dimensions as well as deviations from nominal value in material properties, which can be used either for testing or device diagnostics purposes. Measurements performed on fabricated devices confirm that the 250nm overetch observed on SEM images can be correctly estimated using the proposed technique.
2010
Autores
Mota, PF; Machado da Silva, JAM; Veiga, RA;
Publicação
JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS
Abstract
The estimation of 1 dB compression and third-order intercept points can be obtained after the cross-correlation between dynamic current and output voltage of radio frequency power amplifiers. This estimation is performed using actual power measurements and not power inferred from voltage values. The underlining theory and a correlator that allows implementing this measurement on-chip are presented. The trade-off between measuring voltage and the actual power is also discussed and it is shown that different information concerning the output load is obtained when observing the PA's output voltage and power. Simulation results, obtained with the model of a prototype demonstration chip, show that good accuracy can be obtained with relatively simple measurement conditions. These results include the analysis of optimum stimuli amplitudes and the effect of noise in estimation accuracy.
2001
Autores
Da Silva, JM; Duarte, JS; Matos, JS;
Publicação
11th IMEKO TC4 Symposium on Trends in Electrical Measurements and Instrumentation and 6th IMEKO TC4 Workshop on ADC Modelling and Testing 2001
Abstract
A method for characterizing modulators is described which can be built in large integrated circuits or systems-on-chip. The method can be used to measure gain and phase, as well as, total harmonic distortion and signal to noise and harmonic distortion ratio parameters. It is prone to be built in circuit, when computational resources such as digital signal processors or re-programmable logic are available, but can also be used in computer simulations making it easier to compare expected with measured performances.
1998
Autores
Matos Jose, S; Machado, dSJ;
Publicação
Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems
Abstract
This paper reviews special needs posed by today's technological advances in boards and MCMs, and addresses the requirements they place on Design for Testability techniques for assemblies of complex chips, both digital and mixed-signal. The IEEE P1149.4 mixed-signal test infrastructure is briefly described and its use as a means to support and implement different DfT techniques is described. Actual results are shown of its use on the implementation of a mixed current/voltage testing technique.
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