Abstract
In this paper, we present an application of the simulation annealing optimization algorithm to the problem of high-level synthesis of digital systems, targeted to architectures with run-time reconfigurable functional units. The scheduling, allocation and binding problems are treated simultaneously. Reconfiguration times and execution delays are taken into account, along with pipelined execution and precise clock cycles for consumption of each operand.

Abstract
This paper presents experiments carried out with a prototype test chip provided by the IEEE P1149.4 Mixed-Signal Testing Working Group, which explore the architecture of the proposed analogue boundary module to implement simultaneous observation of power supply current and output voltage, towards mixed current/voltage testing of analogue and mixed-signal circuits.

Abstract
Higher-order statistics (HOS) are a powerful analysis tool in digital signal processing. The most difficult task to use it effectively is the estimation of higher-order moments of sampled data, taken from real systems. For applications that require real-time processing, the performance achieved by common microprocessors or digital signal processors is not good enough to carry out the large number of calculations needed for their estimation. This paper presents ProHos-1, an experimental vector processor for the estimation of the higher-order moments up to the fourth-order. The processor's architecture exploits the structure of the algorithm, to process in parallel four vectors of the input data in a pipe-lined fashion, executing the equivalent to 11 operations in each clock cycle. The design of dedicated control circuits led to high clock rate and small hardware complexity, thus suitable for implementation as an ASIC (Application Specific integrated Circuit).

Abstract
This paper describes the design of a processor specific for testing cores embedded in system-on-chip. This processor which can be implemented within a system's reconfigurable area, shall be responsible for scheduling and control test operations and perform preliminary data processing, as well as to provide the interface with an external tester Building these test operations on-chip allows for simplifying external tester interface and to reduce testing time. The testing procedure and the infrastructure required to test an AID converter is described as an example.

Abstract
Conventional localization systems typically rely on fixed transmission parameters and signal types, limiting their effectiveness in variable and dynamic underwater environments. The present work investigates the potential of adaptable transmission strategies to enhance signal detection estimation for localization purposes. Two widely used signal types, Linear Frequency Modulated (LFM) chirps and BPSK-modulated Msequences, are selected due to their strong autocorrelation properties and robustness to noise. A matched-filter detection approach based on peak correlation is implemented and evaluated. The analysis examines the impact of varying transmission parameters, namely transmission power and signal duration, on detection performance, which inherently influences time-based localization. Results demonstrate that reconfiguring signal parameters significantly reduces estimation dispersion. Moreover, the optimal signal type is shown to depend on the acoustic scenario, with no single waveform consistently outperforming the other. These findings highlight the value of reconfigurable acoustic systems capable of adapting acoustic systems characteristics based on environmental or system feedback, thereby improving localization performance in navigation tasks and dynamic underwater conditions. © 2025 Marine Technology Society.