1998
Autores
Ferreira, JC; Matos, JS;
Publicação
IEEE SYMPOSIUM ON FPGAS FOR CUSTOM COMPUTING MACHINES, PROCEEDINGS
Abstract
1998
Autores
Ferreira, JC; Matos, JS;
Publicação
5th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1998, Surfing the Waves of Science and Technology, Lisbon, Portugal, September 7-10, 1998
Abstract
Mixed hardware/software applications may profit from the use of dynamically reconfigurable hardware for improved performance and adaptability. For this class of systems, the hardware, like the software, can be adapted during execution to the data being processed or to the reactions of the external system being controlled. This paper presents the prototype of an interactive system that supports the rapid development of such applications for a personal computer. The LISP-based prototype supports the assembly of hardware configurations in runtime by combination of component blocks from libraries; it also provides tools for partitioning computations described by a domain-independent data-flow model between software and hardware implementations. Whatever the implementation mode, computations are invoked in a uniform manner, making the dynamically reconfigurable hardware transparent to the user.
1998
Autores
Ferreira, JC; Alves, JC; Albuquerque, C; Oliveira, JF; Ferreira, JS; Matos, JS;
Publicação
5th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1998, Surfing the Waves of Science and Technology, Lisbon, Portugal, September 7-10, 1998
Abstract
The nesting (or placement) problem is an NP-hard combinatorial problem with important industrial applications, e.g. in apparel or footwear industry. This paper describes a hardware infrastructure to accelerate the processing of the underlying geometric information. The system consists of an FPGA-based reconfigurable platform enhanced by an ASIC for the processing of irregular polygons. The paper discusses the need for such a platform, establishes the main design guidelines and describes the architecture and modes of operation of both the reconfigurable infrastructure and the dedicated IC.
1998
Autores
Ferreira, AJS;
Publicação
PROCEEDINGS OF THE 1998 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH AND SIGNAL PROCESSING, VOLS 1-6
Abstract
We present a new algorithm for time-scale expansion of audio signals that comprises: time interpolation, frequency-scale expansion and modification of a spectral representation of the signal. The algorithm relies an an accurate model of signal analysis and synthesis, and was constrained to a non-iterative modification of the magnitudes and the wrapped phases of the relevant sinusoidal components of the signal. The structure of the algorithm is described and its performance is illustrated. A few examples of time-expanded wideband speech can be found on the Internet.
1998
Autores
Matos, J; Machado da Silva, J;
Publicação
1998 IEEE International Conference on Electronics, Circuits and Systems. Surfing the Waves of Science and Technology (Cat. No.98EX196)
Abstract
1998
Autores
Matos Jose, S; Machado, dSJ;
Publicação
Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems
Abstract
This paper reviews special needs posed by today's technological advances in boards and MCMs, and addresses the requirements they place on Design for Testability techniques for assemblies of complex chips, both digital and mixed-signal. The IEEE P1149.4 mixed-signal test infrastructure is briefly described and its use as a means to support and implement different DfT techniques is described. Actual results are shown of its use on the implementation of a mixed current/voltage testing technique.
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