2009
Autores
Menotti, R; Cardoso, JMP; Fernandes, MM; Marques, E;
Publicação
FPL: 2009 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS
Abstract
This paper describes an alternative approach to direct mapping loops described in high-level languages onto FPGAs. Different from other approaches, this technique does not inherit from software pipelining techniques. The control is distributed over operations, thus a finite state machine is not necessary to control the order of operations, allowing efficient hardware implementations. The specification of a hardware block is done by means of LALP, a domain specific language specially designed to help the application of the techniques. While the language syntax resembles C, it contains certain constructs that allow programmer interventions to enforce or relax data dependences as needed, and so optimize the performance of the generated hardware blocks.
2009
Autores
Marcelino, R; Neto, HC; Cardoso, JMP;
Publicação
IECON: 2009 35TH ANNUAL CONFERENCE OF IEEE INDUSTRIAL ELECTRONICS, VOLS 1-6
Abstract
Sorting is an important operation for many embedded computing systems. Since sorting large datasets may slowdown the overall execution, schemes to speedup sorting operations are needed. Bearing in mind the hardware acceleration of sorting, we show in this paper an analysis and comparison among three hardware sorting units: Sorting Network, Insertion Sorting, and FIFO-based Merge Sorting. We focus on embedded computing systems implemented with FPGAs, which give us the flexibility to accommodate customized hardware sorting units. We also present a hardware/software solution for sorting data sets with size larger than the size of the sorting unit. This hardware/software solution achieves 20x overall speedup over a pure software implementation of the well-known quicksort algorithm.
2009
Autores
Cardoso, JM; Diniz, PC;
Publicação
Abstract
2009
Autores
Ferreira, R; Damiany, A; Vendramini, J; Teixeira, T; Cardoso, JMP;
Publicação
RECONFIGURABLE COMPUTING: ARCHITECTURES, TOOLS AND APPLICATIONS
Abstract
Most reconfigurable computing architectures suffer from computationally demanding Placement and Routing (P&R) steps which might hamper their use in contexts requiring dynamic compilation (e.g., to guarantee application portability in embedded systems). Bearing in mind the simplification of P&R steps, this paper presents and analyzes a coarse-grained reconfigurable array extended with global Omega Networks. We show that integrating one or two Omega Networks in a coarse-grained array simplifies the P&R stage with both low hardware resource overhead and low performance degradation (18% for an 8 x 8 array). The experimental results included permit to compare the coarse-grained array with one or two Omega Networks with a coarse-grained array based on a grid of processing elements with neighbor connections. When comparing the execution time to perform the P&R stage needed for the two arrays, we show that the array using two Omega Networks needs a far simple P&R which for the benchmarks used completed on average in about 20x less time.
2009
Autores
Tarrataca, L; Santos, AC; Cardoso, JMP;
Publicação
Proceedings of the ACM Symposium on Applied Computing
Abstract
The need to improve communication between humans and computers has been instrumental in defining new communication models, and accordingly, new ways of interacting with machines. The use of gestures as a means of communication has been a challenging task. The latest generation of smartphones boasts powerful processors and built-in video cameras, making them capable of executing complex and computationally demanding applications. Thus, the integration of gesture recognition systems in smartphone applications might be a close reality. In this paper, we present studies of a gesture recognition prototype system for smartphones. We use a number of tasks typically employed in gesture recognition systems which permit to assess the current feasibility of smartphones to implement this kind of systems. Based on both the execution time and classification performance, we conclude that the latest smartphone generation is capable of executing complex image processing applications, with the most penalizing factor being camera performance regarding capture rates with the current J2ME support. Copyright 2009 ACM.
2009
Autores
Santos, AC; Cardoso, JMP; Ferreira, DR; Diniz, PC;
Publicação
ON THE MOVE TO MEANINGFUL INTERNET SYSTEMS: OTM 2009 WORKSHOPS
Abstract
The ability to infer user context based on a mobile device together with a set of external sensors opens up the way to new context-aware services and applications. In this paper, we describe a mobile context provider that makes use of sensors available in a smartphone as well as sensors externally connected via bluetooth. We describe the system architecture from sensor data acquisition to feature extraction, context inference and the publication of context information to well-known social networking services such as Twitter and Hi5. In the current prototype, context inference is based on decision trees, but the middleware allows the integration of other inference engines. Experimental results suggest that the proposed solution is a promising approach to provide user context to both local and network-level services.
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